/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* arch/arm/include/asm/hardware/ioc.h
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*
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* Copyright (C) Russell King
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*
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* Use these macros to read/write the IOC. All it does is perform the actual
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* read/write.
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*/
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#ifndef __ASMARM_HARDWARE_IOC_H
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#define __ASMARM_HARDWARE_IOC_H
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#ifndef __ASSEMBLY__
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/*
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* We use __raw_base variants here so that we give the compiler the
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* chance to keep IOC_BASE in a register.
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*/
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#define ioc_readb(off) __raw_readb(IOC_BASE + (off))
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#define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off))
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#endif
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#define IOC_CONTROL (0x00)
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#define IOC_KARTTX (0x04)
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#define IOC_KARTRX (0x04)
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#define IOC_IRQSTATA (0x10)
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#define IOC_IRQREQA (0x14)
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#define IOC_IRQCLRA (0x14)
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#define IOC_IRQMASKA (0x18)
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#define IOC_IRQSTATB (0x20)
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#define IOC_IRQREQB (0x24)
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#define IOC_IRQMASKB (0x28)
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#define IOC_FIQSTAT (0x30)
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#define IOC_FIQREQ (0x34)
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#define IOC_FIQMASK (0x38)
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#define IOC_T0CNTL (0x40)
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#define IOC_T0LTCHL (0x40)
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#define IOC_T0CNTH (0x44)
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#define IOC_T0LTCHH (0x44)
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#define IOC_T0GO (0x48)
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#define IOC_T0LATCH (0x4c)
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#define IOC_T1CNTL (0x50)
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#define IOC_T1LTCHL (0x50)
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#define IOC_T1CNTH (0x54)
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#define IOC_T1LTCHH (0x54)
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#define IOC_T1GO (0x58)
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#define IOC_T1LATCH (0x5c)
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#define IOC_T2CNTL (0x60)
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#define IOC_T2LTCHL (0x60)
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#define IOC_T2CNTH (0x64)
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#define IOC_T2LTCHH (0x64)
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#define IOC_T2GO (0x68)
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#define IOC_T2LATCH (0x6c)
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#define IOC_T3CNTL (0x70)
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#define IOC_T3LTCHL (0x70)
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#define IOC_T3CNTH (0x74)
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#define IOC_T3LTCHH (0x74)
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#define IOC_T3GO (0x78)
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#define IOC_T3LATCH (0x7c)
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#endif
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