// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1103.dtsi"
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#include "rv1106-thunder-boot-spi-nor.dtsi"
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/ {
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model = "Rockchip RV1103G RMSL311 DLOC Board";
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compatible = "rockchip,rv1103g-rmsl311-dloc-v10", "rockchip,rv1103";
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chosen {
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bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_arm: vdd-arm {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <724000>;
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regulator-max-microvolt = <1078000>;
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regulator-init-microvolt = <950000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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};
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&sc035gs_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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&fiq_debugger {
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rockchip,irq-mode-enable = <1>;
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status = "okay";
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rockchip,baudrate = <1500000>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m1_xfer>;
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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sc035gs: sc035gs@30 {
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compatible = "smartsens,sc035gs";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "default";
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rockchip,camera-module-lens-name = "default";
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port {
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sc035gs_out: endpoint {
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remote-endpoint = <&dphy1_in>;
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data-lanes = <1 2>;
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};
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};
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};
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vcsel_rk803: vcsel_rk803@63 {
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compatible = "rockchip,rk803";
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status = "okay";
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reg = <0x63>;
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gpio-encc1-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; //Flood
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gpio-encc2-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; //PRO
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};
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};
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&memory {
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reg = <0x00000000 0x04000000>;
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dphy1_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi0_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&npu {
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status = "okay";
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};
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&pwm0 {
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status = "okay";
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};
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&rga2 {
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status = "okay";
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi0_in: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds0_sditf: endpoint {
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remote-endpoint = <&isp0_in>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkisp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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max-input = <640 480 30>;
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};
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&rkisp_vir0 {
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status = "okay";
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ports {
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port@0 {
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isp0_in: endpoint {
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remote-endpoint = <&mipi_lvds0_sditf>;
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};
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};
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};
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};
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&rkisp_vir1 {
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&sfc {
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assigned-clocks = <&cru SCLK_SFC>;
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assigned-clock-rates = <125000000>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <125000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&tsadc {
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status = "okay";
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};
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&uart5 {
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon = <&u2phy>;
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status = "okay";
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};
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