/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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/dts-v1/;
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#include "rk3288-th804.dtsi"
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/ {
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model = "Rockchip RK3288 TH804 avb";
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compatible = "rockchip,rk3288-th804", "rockchip,rk3288";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
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};
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vcc_camera: vcc-camera-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&camera_pwr>;
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regulator-name = "vcc_camera";
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&io_domains {
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status = "okay";
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dvp-supply = <&vcc_18>;
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sdcard-supply = <&vccio_sd>;
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wifi-supply = <&vccio_wl>;
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};
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&isp {
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status = "disabled";
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};
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&i2c3 {
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status = "okay";
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gc2145: gc2145@3c {
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compatible = "galaxycore,gc2145";
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reg = <0x3c>;
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clocks = <&cru SCLK_VIP_OUT>;
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clock-names = "xvclk";
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/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
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pwdn-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc2145_out: endpoint {
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remote-endpoint = <&isp_dvp_in>;
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};
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};
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};
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ov8858: ov8858@36 {
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compatible = "ovti,ov8858";
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reg = <0x36>;
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clocks = <&cru SCLK_VIP_OUT>;
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clock-names = "xvclk";
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan-9569A2";
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/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
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pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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port {
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ov8858_out: endpoint {
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remote-endpoint = <&th_mipi_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi_phy_rx0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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th_mipi_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov8858_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy_rx_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp_mipi_in>;
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};
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};
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};
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};
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&pinctrl {
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camera {
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camera_pwr: camera-pwr {
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rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcfg_pull_none_4ma: pcfg-pull-none-4ma {
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bias-disable;
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drive-strength = <4>;
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};
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isp_pin {
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isp_mipi: isp-mipi {
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rockchip,pins =
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/* cif_clkout */
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<2 RK_PB3 1 &pcfg_pull_none_4ma>;
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};
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isp_dvp_d2d9: isp-d2d9 {
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rockchip,pins =
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/* cif_data2 ... cif_data9 */
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<2 RK_PA0 1 &pcfg_pull_down>,
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<2 RK_PA1 1 &pcfg_pull_down>,
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<2 RK_PA2 1 &pcfg_pull_down>,
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<2 RK_PA3 1 &pcfg_pull_down>,
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<2 RK_PA4 1 &pcfg_pull_down>,
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<2 RK_PA5 1 &pcfg_pull_down>,
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/* cif_sync, cif_href */
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<2 RK_PB0 1 &pcfg_pull_down>,
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<2 RK_PB1 1 &pcfg_pull_down>,
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/* cif_clkin */
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<2 RK_PB2 1 &pcfg_pull_down>;
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};
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isp_dvp_d0d1: isp-d0d1 {
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rockchip,pins =
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/* cif_data0, cif_data1 */
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<2 RK_PB4 1 &pcfg_pull_down>,
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<2 RK_PB5 1 &pcfg_pull_down>;
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};
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};
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};
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&rkisp1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d0d1 &isp_mipi>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_dvp_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&gc2145_out>;
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};
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isp_mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy_rx_out>;
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};
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};
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};
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&vopb {
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assigned-clocks = <&cru DCLK_VOP0>;
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assigned-clock-parents = <&cru PLL_CPLL>;
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};
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&vopl {
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assigned-clocks = <&cru DCLK_VOP1>;
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assigned-clock-parents = <&cru PLL_GPLL>;
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};
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