/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __MPI_ENC_H__
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#define __MPI_ENC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(_WIN32)
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#include "vld.h"
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#endif
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#define MODULE_TAG "mpi_enc"
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#include <assert.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <rockchip/rk_mpi.h>
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//#include "mpp_env.h"
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//#include "mpp_mem.h"
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//#include "printf.h"
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//#include "mpp_time.h"
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#include "mpp_common.h"
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#if USE_RK_AISERVER
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#include "mpp_osd.h"
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#endif
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//#include "utils.h"
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#define BIT(n) (1<<(n))
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#define MAX_FILE_NAME_LENGTH 256
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#define RK_MPP_VERSION_DEFAULT 1
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#define RK_MPP_USE_FULL_RANGE 0
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#define RK_MPP_H264_FORCE_IDR_COUNT 5
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#define RK_MPP_H264_FORCE_IDR_PERIOD 5 //must >=1
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#define RK_MPP_ENC_TEST_NATIVE 0
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#define RK_MPP_USE_ZERO_COPY 1
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#if RK_MPP_USE_ZERO_COPY
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#if !RK_MPP_ENC_TEST_NATIVE
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#define RK_MPP_USE_UVC_VIDEO_BUFFER
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#endif
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extern struct uvc_encode uvc_enc;
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#endif
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#define RK_MPP_DYNAMIC_DEBUG_ON 1 //release version can set to 0
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#define RK_MPP_RANGE_DEBUG_ON 1 //release version can set to 0
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#define RK_MPP_DYNAMIC_DEBUG_OUT_CHECK "/tmp/uvc_enc_out"
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#define RK_MPP_DYNAMIC_DEBUG_IN_CHECK "/tmp/uvc_enc_in" //open it will lower the fps
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#define RK_MPP_RANGE_DEBUG_IN_CHECK "/tmp/uvc_range_in"
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#define RK_MPP_OUT_LEN_DEBUG_CHECK "/tmp/uvc_out_len"
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#define RK_MPP_CLOSE_FRM_LOSS_DEBUG_CHECK "/tmp/uvc_frm_loss"
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#define RK_MPP_ENABLE_UVC_H265 "/tmp/use_encodec_h265"
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#define RK_MPP_DEBUG_OUT_FILE "/uvc_enc_out.bin"
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#define RK_MPP_DEBUG_IN_FILE "/uvc_enc_in.bin"
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#define RK_MPP_ENC_CFG_ORIGINAL_PATH "/etc/mpp_enc_cfg.conf"
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#define RK_MPP_ENC_CFG_MODIFY_PATH "/data/mpp_enc_cfg.conf"
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#ifdef USE_ARM64
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#define RK_MPP_MJPEG_FPS_CONTROL 0
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#else
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#define RK_MPP_MJPEG_FPS_CONTROL 1
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#endif
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//#define DEBUG_OUTPUT 1
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#if RK_MPP_ENC_TEST_NATIVE
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extern struct uvc_encode uvc_enc;
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extern int uvc_encode_init(struct uvc_encode *e, int width, int height, int fcc, int h265, unsigned int fps);
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#define TEST_ENC_TPYE V4L2_PIX_FMT_H264 //V4L2_PIX_FMT_MJPEG
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#endif
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#define MPP_ENC_CFG_MIN_FPS 0 // 0 means use host set fps
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#define MPP_ENC_CFG_MAX_FPS 100
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#define MPP_ENC_CFG_MIN_BPS 2 * 1000
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#define MPP_ENC_CFG_MAX_BPS 98 * 1000 * 1000
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#define MPP_ENC_MJPEG_CFG_MAX_BPS 150 * 1024 * 1024
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#define MPP_ENC_CFG_H264_DEFAULT_PROFILE 100
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#define MPP_ENC_CFG_H264_DEFAULT_LEVEL 40
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#define MPP_ENC_MJPEG_FRC_USE_MPP 0
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//**********for simple frc************//
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#define MJPEG_FRC_BPS_MAX 150*1024*1024
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#define MJPEG_FRC_BPS_MIN 100*1024*1024
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#define MJPEG_FRC_BPS_PER_STEP 1*1024*1024
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#define MJPEG_FRC_QUANT_MAX 10
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#define MJPEG_FRC_QUANT_MIN 6
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#define MJPEG_FRC_QFACTOR_MAX 99
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#define MJPEG_FRC_QFACTOR_MIN 70
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#define MPP_FRC_WAIT_TIME_MS 2
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#define MPP_FRC_WAIT_TIME_US (MPP_FRC_WAIT_TIME_MS * 1000)
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#define MPP_FRC_WAIT_COUNT_MIN (18 / MPP_FRC_WAIT_TIME_MS) // in high resolution, the frame rate is not enough to lower this
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#define MPP_MJPEG_HIGH_FPS_FRC_WAIT_COUNT_MIN (6 / MPP_FRC_WAIT_TIME_MS) // in high resolution, the frame rate is not enough to lower this
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#define MPP_FRC_UP_FRM_SET_INIT 1000
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#define MPP_FRC_UP_FRM_SET_MIN MPP_FRC_UP_FRM_SET_INIT
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#define MPP_FRC_UP_FRM_SET_MAX 0x40000000
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#define MPP_FRC_WAIT_COUNT_OFFSET 5 // bit rate control is too low to increase this
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//***************ROI*********************//
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#define MPP_ENC_ROI_ENABLE 1
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#define UPALIGNTO(value, align) ((value + align - 1) & (~(align - 1)))
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#define UPALIGNTO16(value) UPALIGNTO(value, 16)
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#define VALUE_SCOPE_CHECK(X, MIN, MAX) assert((X >= MIN) && (X <= MAX))
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typedef struct {
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uint16_t x; /**< horizontal position of top left corner */
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uint16_t y; /**< vertical position of top left corner */
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uint16_t w; /**< width of ROI rectangle */
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uint16_t h; /**< height of ROI rectangle */
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uint16_t intra; /**< flag of forced intra macroblock */
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int16_t quality; /**< qp of macroblock */
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uint16_t qp_area_idx; /**< qp min max area select*/
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uint8_t area_map_en; /**< enable area map */
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uint8_t abs_qp_en; /**< absolute qp enable flag*/
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} EncROIRegion;
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//***************GOP MODE*********************//
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typedef enum {
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GOP_MODE_NORMALP = 0, // normal p mode
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GOP_MODE_TSVC2, // tsvc: 2 layer
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GOP_MODE_TSVC3, // tsvc: 3 layer
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GOP_MODE_TSVC4, // tsvc: 4 layer
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GOP_MODE_SMARTP, // smart p mode
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} MpiEncGopMode;
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//************************************//
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enum SIMPLE_FRC_MODE
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{
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FRC_OFF = 0,
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FRC_ONLY_LOW,
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FRC_BOTH_UP_LOW,
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};
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//**********************//
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typedef struct
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{
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MppCodingType type;
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RK_U32 width;
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RK_U32 height;
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MppFrameFormat format;
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RK_U32 debug;
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RK_U32 num_frames;
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RK_U32 fps;
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RK_U32 have_output;
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} MpiEncTestCmd;
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typedef struct
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{
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RK_U32 init;
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RK_U32 max;
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RK_U32 min;
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RK_U32 step;
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RK_U32 max_i_qp;
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RK_U32 min_i_qp;
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} MpiEncQqCfg;
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/********************do not change the order below*******************/
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#define MPP_ENC_CFG_CHANGE_BIT(x) (1 << x)
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#define MPP_STREAM_SAVE_DIR_LEN 32
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typedef struct
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{
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RK_U32 change;
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RK_U32 fbc;
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RK_U32 split_mode;// 1
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RK_U32 split_arg;// 2
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RK_U32 force_idr_count; // 3
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RK_U32 force_idr_period;// 4
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RK_U32 frc_fps;// 5
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enum SIMPLE_FRC_MODE frc_mode; // 6
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MppEncRotationCfg rotation;// 7
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RK_U32 enc_time;
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RK_U32 try_count;
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} MpiEncCommonCfg;
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typedef struct
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{
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RK_U32 change;
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RK_U32 frc_quant; //
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RK_S32 frc_qfactor; //
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RK_U32 frc_bps;
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RK_U32 quant; //bit0 1- 10 default:7
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MppFrameColorRange range; // bit1 full:MPP_FRAME_RANGE_JPEG limit:MPP_FRAME_RANGE_MPEG;
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RK_U32 qfactor; // bit2 0-99 priprity option this. set 0 is close this and set use quant
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RK_S32 qfactor_min; // 3
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RK_S32 qfactor_max; // 4
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RK_U32 gop; // 5
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MppEncRcMode rc_mode; // 6
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RK_U32 bps; // 7
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RK_U32 framerate; // 8
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RK_U32 enc_mode; //enc_mode no have change bit 0:mean auto select 1:close the mjpeg_frc 2: use mjpeg_frc
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RK_U32 qfactor_frc_min;
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MppEncSeiMode sei; // 11
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} MpiEncMjpegCfg;
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typedef struct
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{
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RK_U32 change;
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RK_U32 gop; //0
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RK_U32 gop_normal; //0
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MppEncRcMode rc_mode;
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RK_U32 framerate; ////simple to set.
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MppFrameColorRange range; // full: MPP_FRAME_RANGE_JPEG limit:MPP_FRAME_RANGE_MPEG;
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MppEncHeaderMode head_each_idr;
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MppEncSeiMode sei;//5
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MpiEncQqCfg qp;//6-9
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RK_U32 profile;//10
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RK_U32 cabac_en;
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RK_U32 cabac_idc;
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RK_U32 trans_8x8;//
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RK_U32 level;
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RK_U32 bps;//15
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RK_U32 idr_bps;//16
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RK_U32 vi_len;//17
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MpiEncGopMode gop_mode; //18
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} MpiEncH264Cfg;
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typedef struct
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{
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RK_U32 change;
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RK_U32 gop; //0
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RK_U32 gop_normal; //0
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MppEncRcMode rc_mode;
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RK_U32 framerate;
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MppFrameColorRange range; //full: MPP_FRAME_RANGE_JPEG limit:MPP_FRAME_RANGE_MPEG;
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MppEncHeaderMode head_each_idr;
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MppEncSeiMode sei;//5
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MpiEncQqCfg qp;//6-11
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RK_U32 bps;//12
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RK_U32 idr_bps;//13
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RK_U32 vi_len;//14
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MpiEncGopMode gop_mode; // 15
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} MpiEncH265Cfg;
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#if MPP_ENC_OSD_ENABLE
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#define MPP_ENC_OSD_IMAGE_PATH_LEN 32
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typedef struct
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{
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bool set_ok;
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bool enable; //dynamic on/off set this
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enum OSD_REGION_TYPE type;
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RK_U32 start_x;
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RK_U32 start_y;
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char image_path[MPP_ENC_OSD_IMAGE_PATH_LEN];//*image_path;//
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// for mjpeg rga osd
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RK_U32 width;
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RK_U32 height;
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int rga_osd_fd;
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unsigned int handle; // for drm handle
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uint8_t *buffer;
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int drm_size;
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// for mjpeg rga osd
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} MpiEncOSDCfg;
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#endif
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/***************************o not change the order above**************************************/
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typedef struct MppBuffNode
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{
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MppFrame frame;
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MppPacket packet;
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MppBuffer buf;
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MppBuffer pkt_buf_out;
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int buf_fd;
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bool init;
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} MppBuffInfo;
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#define IN_BUF_COUNT_MAX 10
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#define OUT_BUF_COUNT_MAX 3
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#if RK_MPP_MJPEG_FPS_CONTROL
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#define MJPEG_FPS_CONTROL_V2 1
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#endif
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typedef struct
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{
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#if RK_MPP_MJPEG_FPS_CONTROL
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void *fps_handle;
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#endif
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RK_U32 fps;
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RK_U32 loss_frm;
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RK_U32 continuous_frm;
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RK_U32 frc_up_frm_set;
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bool set_frc_low;
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bool fps_ctr_enable;
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MpiEncCommonCfg common_cfg;
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MpiEncMjpegCfg mjpeg_cfg;
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MpiEncH264Cfg h264_cfg;
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MpiEncH265Cfg h265_cfg;
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// global flow control flag
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RK_U32 frm_eos;
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RK_U32 pkt_eos;
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RK_U32 frame_count;
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RK_U64 stream_size;
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#if RK_MPP_RANGE_DEBUG_ON
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#define RANGE_PATH_MAX_LEN 128
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FILE *fp_range_path;
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FILE *fp_range_file;
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char *range_path;
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#endif
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// src and dst
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FILE *fp_input;
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FILE *fp_output;
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char streamin_save_dir[MPP_STREAM_SAVE_DIR_LEN];
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char streamout_save_dir[MPP_STREAM_SAVE_DIR_LEN];
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// base flow context
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MppCtx ctx;
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MppApi *mpi;
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RK_U32 use_legacy_cfg;
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MppEncCfg cfg;
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MppEncPrepCfg prep_cfg;
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MppEncRcCfg rc_cfg;
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MppEncCodecCfg codec_cfg;
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MppEncSliceSplit split_cfg;
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#if MPP_ENC_OSD_ENABLE
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/*
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* osd idx size range from 16x16 bytes(pixels) to hor_stride*ver_stride(bytes).
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* for general use, 1/8 Y buffer is enough.
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*/
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MppEncOSDPltCfg osd_plt_cfg;
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MppEncOSDPlt osd_plt;
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MppEncOSDData osd_data;
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MppBuffer osd_idx_buf;
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size_t osd_idx_size;
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RK_U32 osd_count;
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bool osd_enable;
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bool osd_plt_user;
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bool osd_index_enable[OSD_REGIONS_CNT];
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MpiEncOSDCfg osd_cfg[OSD_REGIONS_CNT];
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RK_U32 plt_table[PALETTE_TABLE_LEN]; //ayuv map
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int rga_osd_drm_fd;
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#endif
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#if MPP_ENC_ROI_ENABLE
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RK_U32 roi_enable;
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RK_U32 roi_number;
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MppEncROIRegion *roi_region;
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MppEncROICfg roi_cfg;
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#endif
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// input / output
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MppBuffer frm_buf;
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MppEncSeiMode sei_mode;
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MppEncHeaderMode header_mode;
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// paramter for resource malloc
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RK_U32 width;
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RK_U32 height;
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RK_U32 hor_stride;
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RK_U32 ver_stride;
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MppFrameFormat fmt;
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MppCodingType type;
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RK_S32 num_frames;
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RK_S32 loop_times;
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// resources
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size_t header_size;
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size_t frame_size;
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/* NOTE: packet buffer may overflow */
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size_t packet_size;
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RK_U32 split_mode;
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RK_U32 split_arg;
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RK_U32 user_data_enable;
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// rate control runtime parameter
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RK_S32 gop;
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RK_S32 fps_in_flex;
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RK_S32 fps_in_den;
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RK_S32 fps_in_num;
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RK_S32 fps_out_flex;
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RK_S32 fps_out_den;
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RK_S32 fps_out_num;
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RK_S32 bps;
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MppFrame frame;
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MppPacket packet;
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void *enc_data;
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size_t enc_len;
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RK_U32 enc_version;
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RK_U32 h2645_frm_count;
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#if RK_MPP_USE_ZERO_COPY
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MppBufferGroup pkt_grp;
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MppBuffer pkt_buf;
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#endif
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pthread_t check_cfg_change_hd;
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int cfg_notify_fd;
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int cfg_notify_wd;
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MppBuffInfo out_buff_info[OUT_BUF_COUNT_MAX];
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MppBuffInfo in_buff_info[IN_BUF_COUNT_MAX];
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int yuv_rotation_drm_fd;
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int yuv_rotation_fd;
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unsigned int yuv_rotation_handle; // for drm handle
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int yuv_rotation_drm_size;
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MppEncUserData user_data;
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} MpiEncTestData;
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typedef struct MPP_ENC_INFO {
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int fd;
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size_t size;
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RK_U32 pts;
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RK_U32 seq;
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} MPP_ENC_INFO_DEF;
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MPP_RET mpi_enc_test_init(MpiEncTestCmd *cmd, MpiEncTestData **data);
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MPP_RET mpi_enc_test_run(MpiEncTestData **data, MPP_ENC_INFO_DEF *info);
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MPP_RET mpi_enc_test_deinit(MpiEncTestData **data);
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MPP_RET mpi_enc_inbuf_deinit(MpiEncTestData *data);
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void mpi_enc_cmd_config(MpiEncTestCmd *cmd, int width, int height, int fcc, int h265, unsigned int fps);
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void mpi_enc_cmd_config_mjpg(MpiEncTestCmd *cmd, int width, int height);
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void mpi_enc_cmd_config_h264(MpiEncTestCmd *cmd, int width, int height);
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void mpi_enc_set_format(MppFrameFormat format);
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int mpi_enc_get_h264_extra(MpiEncTestData *p, void *buffer, size_t *size);
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RK_S32 mpi_get_env_u32(const char *name, RK_U32 *value, RK_U32 default_value);
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MPP_RET mpp_enc_cfg_set_s32(MppEncCfg cfg, const char *name, RK_S32 val);
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MPP_RET mpp_enc_cfg_set_u32(MppEncCfg cfg, const char *name, RK_U32 val);
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MPP_RET mpp_enc_cfg_set_s64(MppEncCfg cfg, const char *name, RK_S64 val);
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MPP_RET mpp_enc_cfg_set_u64(MppEncCfg cfg, const char *name, RK_U64 val);
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MPP_RET mpp_enc_cfg_set_ptr(MppEncCfg cfg, const char *name, void *val);
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MPP_RET mpp_enc_cfg_get_s32(MppEncCfg cfg, const char *name, RK_S32 *val);
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MPP_RET mpp_enc_cfg_get_u32(MppEncCfg cfg, const char *name, RK_U32 *val);
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MPP_RET mpp_enc_cfg_get_s64(MppEncCfg cfg, const char *name, RK_S64 *val);
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MPP_RET mpp_enc_cfg_get_u64(MppEncCfg cfg, const char *name, RK_U64 *val);
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#ifdef RK_MPP_USE_UVC_VIDEO_BUFFER
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struct uvc_buffer *uvc_buffer_write_get(int id);
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void uvc_buffer_read_set(int id, struct uvc_buffer *buf);
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void uvc_user_lock();
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void uvc_user_unlock();
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struct uvc_buffer *uvc_buffer_write_get_nolock(int id);
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void uvc_buffer_read_set_nolock(int id, struct uvc_buffer *buf);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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