/*
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* Copyright 2020 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define MODULE_TAG "mpp_dec_vproc"
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#include <string.h>
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#include "mpp_env.h"
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#include "mpp_mem.h"
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#include "mpp_common.h"
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#include "mpp_dec_impl.h"
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#include "mpp_frame_impl.h"
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#include "mpp_dec_vproc.h"
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#include "iep_api.h"
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#include "iep2_api.h"
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#define dec_vproc_dbg(flag, fmt, ...) \
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do { \
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_mpp_dbg(vproc_debug, flag, fmt, ## __VA_ARGS__); \
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} while (0)
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#define vproc_dbg_f(flag, fmt, ...) \
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do { \
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_mpp_dbg_f(vproc_debug, flag, fmt, ## __VA_ARGS__); \
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} while (0)
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#define VPROC_DBG_FUNCTION (0x00000001)
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#define VPROC_DBG_STATUS (0x00000002)
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#define VPROC_DBG_RESET (0x00000004)
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#define vproc_dbg_func(fmt, ...) \
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vproc_dbg_f(VPROC_DBG_FUNCTION, fmt, ## __VA_ARGS__);
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#define vproc_dbg_status(fmt, ...) \
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vproc_dbg_f(VPROC_DBG_STATUS, fmt, ## __VA_ARGS__);
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#define vproc_dbg_reset(fmt, ...) \
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vproc_dbg_f(VPROC_DBG_RESET, fmt, ## __VA_ARGS__);
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RK_U32 vproc_debug = 0;
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typedef struct MppDecVprocCtxImpl_t {
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Mpp *mpp;
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HalTaskGroup task_group;
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MppBufSlots slots;
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MppThread *thd;
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RK_U32 reset;
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sem_t reset_sem;
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IepCtx iep_ctx;
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iep_com_ctx *com_ctx;
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IepCmdParamDeiCfg dei_cfg;
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// slot index for previous frame and current frame
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RK_S32 prev_idx0;
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MppFrame prev_frm0;
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RK_S32 prev_idx1;
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MppFrame prev_frm1;
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} MppDecVprocCtxImpl;
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static void dec_vproc_put_frame(Mpp *mpp, MppFrame frame, MppBuffer buf, RK_S64 pts, RK_U32 err)
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{
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mpp_list *list = mpp->mFrmOut;
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MppFrame out = NULL;
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MppFrameImpl *impl = NULL;
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mpp_frame_init(&out);
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mpp_frame_copy(out, frame);
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mpp_frame_set_errinfo(out, err);
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impl = (MppFrameImpl *)out;
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if (pts >= 0)
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impl->pts = pts;
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if (buf)
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impl->buffer = buf;
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list->lock();
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list->add_at_tail(&out, sizeof(out));
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mpp_dbg_pts("output frame pts %lld\n", mpp_frame_get_pts(out));
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mpp->mFramePutCount++;
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list->signal();
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list->unlock();
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if (mpp->mDec)
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mpp_dec_callback(mpp->mDec, MPP_DEC_EVENT_ON_FRM_READY, out);
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}
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static void dec_vproc_clr_prev0(MppDecVprocCtxImpl *ctx)
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{
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if (vproc_debug & VPROC_DBG_STATUS) {
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if (ctx->prev_frm0) {
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MppBuffer buf = mpp_frame_get_buffer(ctx->prev_frm0);
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RK_S32 fd = (buf) ? (mpp_buffer_get_fd(buf)) : (-1);
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mpp_log("clearing prev index %d frm %p fd %d\n", ctx->prev_idx0,
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ctx->prev_frm0, fd);
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} else
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mpp_log("clearing nothing\n");
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}
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if (ctx->prev_frm0) {
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MppBuffer buf = mpp_frame_get_buffer(ctx->prev_frm0);
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if (buf)
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mpp_buffer_put(buf);
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}
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if (ctx->prev_idx0 >= 0)
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mpp_buf_slot_clr_flag(ctx->slots, ctx->prev_idx0, SLOT_QUEUE_USE);
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ctx->prev_idx0 = -1;
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ctx->prev_frm0 = NULL;
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}
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static void dec_vproc_clr_prev1(MppDecVprocCtxImpl *ctx)
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{
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if (vproc_debug & VPROC_DBG_STATUS) {
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if (ctx->prev_frm1) {
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MppBuffer buf = mpp_frame_get_buffer(ctx->prev_frm1);
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RK_S32 fd = (buf) ? (mpp_buffer_get_fd(buf)) : (-1);
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mpp_log("clearing prev index %d frm %p fd %d\n", ctx->prev_idx1,
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ctx->prev_frm1, fd);
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} else
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mpp_log("clearing nothing\n");
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}
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if (ctx->prev_frm1) {
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MppBuffer buf = mpp_frame_get_buffer(ctx->prev_frm1);
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if (buf)
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mpp_buffer_put(buf);
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}
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if (ctx->prev_idx1 >= 0)
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mpp_buf_slot_clr_flag(ctx->slots, ctx->prev_idx1, SLOT_QUEUE_USE);
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ctx->prev_idx1 = -1;
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ctx->prev_frm1 = NULL;
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}
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static void dec_vproc_clr_prev(MppDecVprocCtxImpl *ctx)
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{
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dec_vproc_clr_prev0(ctx);
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dec_vproc_clr_prev1(ctx);
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}
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static void dec_vproc_set_img_fmt(IepImg *img, MppFrame frm)
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{
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memset(img, 0, sizeof(*img));
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img->act_w = mpp_frame_get_width(frm);
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img->act_h = mpp_frame_get_height(frm);
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img->vir_w = mpp_frame_get_hor_stride(frm);
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img->vir_h = mpp_frame_get_ver_stride(frm);
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img->format = IEP_FORMAT_YCbCr_420_SP;
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}
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static void dec_vproc_set_img(MppDecVprocCtxImpl *ctx, IepImg *img, RK_S32 fd, IepCmd cmd)
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{
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RK_S32 y_size = img->vir_w * img->vir_h;
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img->mem_addr = fd;
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img->uv_addr = fd + (y_size << 10);
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img->v_addr = fd + ((y_size + y_size / 4) << 10);
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MPP_RET ret = ctx->com_ctx->ops->control(ctx->iep_ctx, cmd, img);
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if (ret)
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mpp_log_f("control %08x failed %d\n", cmd, ret);
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}
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static MppBuffer dec_vproc_get_buffer(MppBufferGroup group, size_t size)
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{
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MppBuffer buf = NULL;
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do {
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mpp_buffer_get(group, &buf, size);
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if (NULL == buf)
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usleep(2000);
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else
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break;
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} while (1);
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return buf;
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}
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// start deinterlace hardware
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static void dec_vproc_start_dei(MppDecVprocCtxImpl *ctx, RK_U32 mode)
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{
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MPP_RET ret;
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if (ctx->com_ctx->ver == 1) {
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ctx->dei_cfg.dei_field_order =
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(mode & MPP_FRAME_FLAG_TOP_FIRST) ?
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(IEP_DEI_FLD_ORDER_TOP_FIRST) :
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(IEP_DEI_FLD_ORDER_BOT_FIRST);
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ret = ctx->com_ctx->ops->control(ctx->iep_ctx,
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IEP_CMD_SET_DEI_CFG, &ctx->dei_cfg);
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if (ret)
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mpp_log_f("IEP_CMD_SET_DEI_CFG failed %d\n", ret);
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}
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ret = ctx->com_ctx->ops->control(ctx->iep_ctx, IEP_CMD_RUN_SYNC, NULL);
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if (ret)
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mpp_log_f("IEP_CMD_RUN_SYNC failed %d\n", ret);
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}
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static void dec_vproc_set_dei_v1(MppDecVprocCtxImpl *ctx, MppFrame frm)
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{
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MPP_RET ret = MPP_OK;
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IepImg img;
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Mpp *mpp = ctx->mpp;
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MppBufferGroup group = mpp->mFrameGroup;
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RK_U32 mode = mpp_frame_get_mode(frm);
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MppBuffer buf = mpp_frame_get_buffer(frm);
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MppBuffer dst0 = NULL;
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MppBuffer dst1 = NULL;
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int fd = -1;
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size_t buf_size = mpp_buffer_get_size(buf);
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RK_U32 frame_err = 0;
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// setup source IepImg
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dec_vproc_set_img_fmt(&img, frm);
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ret = ctx->com_ctx->ops->control(ctx->iep_ctx, IEP_CMD_INIT, NULL);
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if (ret)
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mpp_log_f("IEP_CMD_INIT failed %d\n", ret);
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IepCap_t *cap = NULL;
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ret = ctx->com_ctx->ops->control(ctx->iep_ctx, IEP_CMD_QUERY_CAP, &cap);
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if (ret)
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mpp_log_f("IEP_CMD_QUERY_CAP failed %d\n", ret);
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// setup destination IepImg with new buffer
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// NOTE: when deinterlace is enabled parser thread will reserve
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// more buffer than normal case
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if (ctx->prev_frm0 && cap && cap->i4_deinterlace_supported) {
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// 4 in 2 out case
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vproc_dbg_status("4 field in and 2 frame out\n");
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RK_S64 prev_pts = mpp_frame_get_pts(ctx->prev_frm0);
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RK_S64 curr_pts = mpp_frame_get_pts(frm);
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RK_S64 first_pts = (prev_pts + curr_pts) / 2;
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buf = mpp_frame_get_buffer(ctx->prev_frm0);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_SRC);
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frame_err = mpp_frame_get_errinfo(ctx->prev_frm0) ||
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mpp_frame_get_discard(ctx->prev_frm0);
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// setup dst 0
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dst0 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst0);
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fd = mpp_buffer_get_fd(dst0);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DST);
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buf = mpp_frame_get_buffer(frm);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_SRC1);
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frame_err |= mpp_frame_get_errinfo(frm) ||
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mpp_frame_get_discard(frm);
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// setup dst 1
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dst1 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst1);
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fd = mpp_buffer_get_fd(dst1);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_DST1);
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ctx->dei_cfg.dei_mode = IEP_DEI_MODE_I4O2;
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mode = mode | MPP_FRAME_FLAG_IEP_DEI_I4O2;
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mpp_frame_set_mode(frm, mode);
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// start hardware
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dec_vproc_start_dei(ctx, mode);
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// NOTE: we need to process pts here
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if (mode & MPP_FRAME_FLAG_TOP_FIRST) {
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dec_vproc_put_frame(mpp, frm, dst0, first_pts, frame_err);
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dec_vproc_put_frame(mpp, frm, dst1, curr_pts, frame_err);
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} else {
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dec_vproc_put_frame(mpp, frm, dst1, first_pts, frame_err);
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dec_vproc_put_frame(mpp, frm, dst0, curr_pts, frame_err);
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}
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} else {
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// 2 in 1 out case
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vproc_dbg_status("2 field in and 1 frame out\n");
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buf = mpp_frame_get_buffer(frm);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_SRC);
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frame_err = mpp_frame_get_errinfo(frm) ||
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mpp_frame_get_discard(frm);
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// setup dst 0
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dst0 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst0);
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fd = mpp_buffer_get_fd(dst0);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DST);
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ctx->dei_cfg.dei_mode = IEP_DEI_MODE_I2O1;
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mode = mode | MPP_FRAME_FLAG_IEP_DEI_I2O1;
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mpp_frame_set_mode(frm, mode);
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// start hardware
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dec_vproc_start_dei(ctx, mode);
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dec_vproc_put_frame(mpp, frm, dst0, -1, frame_err);
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}
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}
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static void dec_vproc_set_dei_v2(MppDecVprocCtxImpl *ctx, MppFrame frm)
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{
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IepImg img;
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Mpp *mpp = ctx->mpp;
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MppBufferGroup group = mpp->mFrameGroup;
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RK_U32 mode = mpp_frame_get_mode(frm);
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MppBuffer buf = mpp_frame_get_buffer(frm);
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MppBuffer dst0 = NULL;
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MppBuffer dst1 = NULL;
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int fd = -1;
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size_t buf_size = mpp_buffer_get_size(buf);
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iep_com_ops *ops = ctx->com_ctx->ops;
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RK_U32 frame_err = 0;
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// setup source IepImg
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dec_vproc_set_img_fmt(&img, frm);
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if (ctx->prev_frm1 && ctx->prev_frm0) {
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struct iep2_api_params params;
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// 5 in 2 out case
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vproc_dbg_status("5 field in and 2 frame out\n");
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RK_S64 prev_pts = mpp_frame_get_pts(ctx->prev_frm1);
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RK_S64 curr_pts = mpp_frame_get_pts(ctx->prev_frm0);
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RK_S64 first_pts = (prev_pts + curr_pts) / 2;
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// setup source frames
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buf = mpp_frame_get_buffer(ctx->prev_frm0);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_SRC);
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frame_err = mpp_frame_get_errinfo(ctx->prev_frm0) ||
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mpp_frame_get_discard(ctx->prev_frm0);
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buf = mpp_frame_get_buffer(frm);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_SRC1);
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frame_err |= mpp_frame_get_errinfo(frm) ||
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mpp_frame_get_discard(frm);
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buf = mpp_frame_get_buffer(ctx->prev_frm1);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_SRC2);
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frame_err |= mpp_frame_get_errinfo(ctx->prev_frm1) ||
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mpp_frame_get_discard(ctx->prev_frm0);
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// setup dst 0
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dst0 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst0);
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fd = mpp_buffer_get_fd(dst0);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DST);
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// setup dst 1
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dst1 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst1);
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fd = mpp_buffer_get_fd(dst1);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_DST1);
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params.ptype = IEP2_PARAM_TYPE_MODE;
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params.param.mode.dil_mode = IEP2_DIL_MODE_I5O2;
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params.param.mode.out_mode = IEP2_OUT_MODE_LINE;
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params.param.mode.dil_order = (mode & MPP_FRAME_FLAG_TOP_FIRST) ?
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IEP2_FIELD_ORDER_TFF : IEP2_FIELD_ORDER_BFF;
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ops->control(ctx->iep_ctx, IEP_CMD_SET_DEI_CFG, ¶ms);
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params.ptype = IEP2_PARAM_TYPE_COM;
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params.param.com.sfmt = IEP2_FMT_YUV420;
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params.param.com.dfmt = IEP2_FMT_YUV420;
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params.param.com.sswap = IEP2_YUV_SWAP_SP_UV;
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params.param.com.dswap = IEP2_YUV_SWAP_SP_UV;
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params.param.com.width = mpp_frame_get_hor_stride(frm);
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params.param.com.height = mpp_frame_get_ver_stride(frm);
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ops->control(ctx->iep_ctx, IEP_CMD_SET_DEI_CFG, ¶ms);
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mode = mode | MPP_FRAME_FLAG_IEP_DEI_I4O2;
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mpp_frame_set_mode(frm, mode);
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// start hardware
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dec_vproc_start_dei(ctx, mode);
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// NOTE: we need to process pts here
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if (mode & MPP_FRAME_FLAG_TOP_FIRST) {
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dec_vproc_put_frame(mpp, frm, dst0, first_pts, frame_err);
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dec_vproc_put_frame(mpp, frm, dst1, curr_pts, frame_err);
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} else {
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dec_vproc_put_frame(mpp, frm, dst1, first_pts, frame_err);
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dec_vproc_put_frame(mpp, frm, dst0, curr_pts, frame_err);
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}
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} else {
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struct iep2_api_params params;
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// 2 in 1 out case
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vproc_dbg_status("2 field in and 1 frame out\n");
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buf = mpp_frame_get_buffer(frm);
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fd = mpp_buffer_get_fd(buf);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_SRC);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_SRC1);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_SRC2);
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frame_err = mpp_frame_get_errinfo(frm) ||
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mpp_frame_get_discard(frm);
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// setup dst 0
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dst0 = dec_vproc_get_buffer(group, buf_size);
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mpp_assert(dst0);
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fd = mpp_buffer_get_fd(dst0);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DST);
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dec_vproc_set_img(ctx, &img, fd, IEP_CMD_SET_DEI_DST1);
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params.ptype = IEP2_PARAM_TYPE_MODE;
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params.param.mode.dil_mode = IEP2_DIL_MODE_I1O1T;
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params.param.mode.out_mode = IEP2_OUT_MODE_LINE;
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ops->control(ctx->iep_ctx, IEP_CMD_SET_DEI_CFG, ¶ms);
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params.ptype = IEP2_PARAM_TYPE_COM;
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params.param.com.sfmt = IEP2_FMT_YUV420;
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params.param.com.dfmt = IEP2_FMT_YUV420;
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params.param.com.sswap = IEP2_YUV_SWAP_SP_UV;
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params.param.com.dswap = IEP2_YUV_SWAP_SP_UV;
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params.param.com.width = mpp_frame_get_hor_stride(frm);
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params.param.com.height = mpp_frame_get_ver_stride(frm);
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ops->control(ctx->iep_ctx, IEP_CMD_SET_DEI_CFG, ¶ms);
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mode = mode | MPP_FRAME_FLAG_IEP_DEI_I2O1;
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mpp_frame_set_mode(frm, mode);
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// start hardware
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dec_vproc_start_dei(ctx, mode);
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dec_vproc_put_frame(mpp, frm, dst0, -1, frame_err);
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}
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}
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static void *dec_vproc_thread(void *data)
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{
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MppDecVprocCtxImpl *ctx = (MppDecVprocCtxImpl *)data;
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HalTaskGroup tasks = ctx->task_group;
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MppThread *thd = ctx->thd;
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Mpp *mpp = ctx->mpp;
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MppDecImpl *dec = (MppDecImpl *)mpp->mDec;
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MppBufSlots slots = dec->frame_slots;
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HalTaskHnd task = NULL;
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HalTaskInfo task_info;
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HalDecVprocTask *task_vproc = &task_info.dec_vproc;
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mpp_dbg_info("mpp_dec_post_proc_thread started\n");
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while (1) {
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MPP_RET ret = MPP_OK;
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{
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AutoMutex autolock(thd->mutex());
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if (MPP_THREAD_RUNNING != thd->get_status())
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break;
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if (hal_task_get_hnd(tasks, TASK_PROCESSING, &task)) {
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{
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AutoMutex autolock_reset(thd->mutex(THREAD_CONTROL));
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if (ctx->reset) {
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vproc_dbg_reset("reset start\n");
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dec_vproc_clr_prev(ctx);
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ctx->reset = 0;
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sem_post(&ctx->reset_sem);
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vproc_dbg_reset("reset done\n");
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continue;
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}
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}
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thd->wait();
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continue;
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}
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}
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// process all task then do reset process
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thd->lock(THREAD_CONTROL);
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thd->unlock(THREAD_CONTROL);
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if (task) {
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ret = hal_task_hnd_get_info(task, &task_info);
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mpp_assert(ret == MPP_OK);
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RK_S32 index = task_vproc->input;
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RK_U32 eos = task_vproc->flags.eos;
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RK_U32 change = task_vproc->flags.info_change;
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MppFrame frm = NULL;
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if (eos && index < 0) {
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vproc_dbg_status("eos signal\n");
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mpp_frame_init(&frm);
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mpp_frame_set_eos(frm, eos);
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dec_vproc_put_frame(mpp, frm, NULL, -1, 0);
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dec_vproc_clr_prev(ctx);
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mpp_frame_deinit(&frm);
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hal_task_hnd_set_status(task, TASK_IDLE);
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continue;
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}
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mpp_buf_slot_get_prop(slots, index, SLOT_FRAME_PTR, &frm);
|
|
if (change) {
|
vproc_dbg_status("info change\n");
|
dec_vproc_put_frame(mpp, frm, NULL, -1, 0);
|
dec_vproc_clr_prev(ctx);
|
|
hal_task_hnd_set_status(task, TASK_IDLE);
|
continue;
|
}
|
|
RK_S32 tmp = -1;
|
mpp_buf_slot_dequeue(slots, &tmp, QUEUE_DEINTERLACE);
|
mpp_assert(tmp == index);
|
|
if (!dec->reset_flag && ctx->iep_ctx) {
|
if (ctx->com_ctx->ver == 1) {
|
dec_vproc_set_dei_v1(ctx, frm);
|
} else {
|
dec_vproc_set_dei_v2(ctx, frm);
|
}
|
}
|
|
|
if (ctx->com_ctx->ver == 1) {
|
dec_vproc_clr_prev0(ctx);
|
ctx->prev_idx0 = index;
|
ctx->prev_frm0 = frm;
|
} else {
|
dec_vproc_clr_prev1(ctx);
|
ctx->prev_idx1 = ctx->prev_idx0;
|
ctx->prev_idx0 = index;
|
|
ctx->prev_frm1 = ctx->prev_frm0;
|
ctx->prev_frm0 = frm;
|
}
|
|
if (eos) {
|
dec_vproc_clr_prev(ctx);
|
if (ctx->com_ctx->ver == 2) {
|
ctx->prev_idx1 = ctx->prev_idx0;
|
ctx->prev_idx0 = index;
|
dec_vproc_clr_prev(ctx);
|
}
|
}
|
|
hal_task_hnd_set_status(task, TASK_IDLE);
|
}
|
}
|
mpp_dbg_info("mpp_dec_post_proc_thread exited\n");
|
|
return NULL;
|
}
|
|
MPP_RET dec_vproc_init(MppDecVprocCtx *ctx, MppDecVprocCfg *cfg)
|
{
|
MPP_RET ret = MPP_OK;
|
if (NULL == ctx || NULL == cfg || NULL == cfg->mpp) {
|
mpp_err_f("found NULL input ctx %p mpp %p\n", ctx, cfg->mpp);
|
return MPP_ERR_NULL_PTR;
|
}
|
|
vproc_dbg_func("in\n");
|
mpp_env_get_u32("vproc_debug", &vproc_debug, 0);
|
|
*ctx = NULL;
|
|
MppDecVprocCtxImpl *p = mpp_calloc(MppDecVprocCtxImpl, 1);
|
if (NULL == p) {
|
mpp_err_f("malloc failed\n");
|
return MPP_ERR_MALLOC;
|
}
|
|
p->mpp = (Mpp *)cfg->mpp;
|
p->slots = ((MppDecImpl *)p->mpp->mDec)->frame_slots;
|
p->thd = new MppThread(dec_vproc_thread, p, "mpp_dec_vproc");
|
sem_init(&p->reset_sem, 0, 0);
|
ret = hal_task_group_init(&p->task_group, TASK_BUTT, 4, sizeof(HalDecVprocTask));
|
if (ret) {
|
mpp_err_f("create task group failed\n");
|
delete p->thd;
|
MPP_FREE(p);
|
return MPP_ERR_MALLOC;
|
}
|
cfg->task_group = p->task_group;
|
|
/// TODO, seperate iep1/2 api
|
p->com_ctx = get_iep_ctx();
|
if (!p->com_ctx) {
|
mpp_err("failed to require context\n");
|
delete p->thd;
|
|
if (p->task_group) {
|
hal_task_group_deinit(p->task_group);
|
p->task_group = NULL;
|
}
|
|
MPP_FREE(p);
|
|
return MPP_ERR_MALLOC;
|
}
|
|
ret = p->com_ctx->ops->init(&p->com_ctx->priv);
|
p->iep_ctx = p->com_ctx->priv;
|
if (!p->thd || ret) {
|
mpp_err("failed to create context\n");
|
if (p->thd) {
|
delete p->thd;
|
p->thd = NULL;
|
}
|
|
if (p->iep_ctx)
|
p->com_ctx->ops->deinit(p->iep_ctx);
|
|
if (p->task_group) {
|
hal_task_group_deinit(p->task_group);
|
p->task_group = NULL;
|
}
|
|
put_iep_ctx(p->com_ctx);
|
|
MPP_FREE(p);
|
} else {
|
p->dei_cfg.dei_mode = IEP_DEI_MODE_I2O1;
|
p->dei_cfg.dei_field_order = IEP_DEI_FLD_ORDER_BOT_FIRST;
|
/*
|
* We need to turn off this switch to prevent some areas
|
* of the video from flickering.
|
*/
|
p->dei_cfg.dei_high_freq_en = 0;
|
p->dei_cfg.dei_high_freq_fct = 64;
|
p->dei_cfg.dei_ei_mode = 0;
|
p->dei_cfg.dei_ei_smooth = 1;
|
p->dei_cfg.dei_ei_sel = 0;
|
p->dei_cfg.dei_ei_radius = 2;
|
|
p->prev_idx0 = -1;
|
p->prev_frm0 = NULL;
|
p->prev_idx1 = -1;
|
p->prev_frm1 = NULL;
|
}
|
|
*ctx = p;
|
|
vproc_dbg_func("out\n");
|
return ret;
|
}
|
|
MPP_RET dec_vproc_deinit(MppDecVprocCtx ctx)
|
{
|
if (NULL == ctx) {
|
mpp_err_f("found NULL input\n");
|
return MPP_ERR_NULL_PTR;
|
}
|
vproc_dbg_func("in\n");
|
|
MppDecVprocCtxImpl *p = (MppDecVprocCtxImpl *)ctx;
|
if (p->thd) {
|
p->thd->stop();
|
delete p->thd;
|
p->thd = NULL;
|
}
|
|
if (p->iep_ctx)
|
p->com_ctx->ops->deinit(p->iep_ctx);
|
|
if (p->task_group) {
|
hal_task_group_deinit(p->task_group);
|
p->task_group = NULL;
|
}
|
|
if (p->com_ctx) {
|
put_iep_ctx(p->com_ctx);
|
p->com_ctx = NULL;
|
}
|
|
sem_destroy(&p->reset_sem);
|
mpp_free(p);
|
|
vproc_dbg_func("out\n");
|
return MPP_OK;
|
}
|
|
MPP_RET dec_vproc_start(MppDecVprocCtx ctx)
|
{
|
if (NULL == ctx) {
|
mpp_err_f("found NULL input\n");
|
return MPP_ERR_NULL_PTR;
|
}
|
vproc_dbg_func("in\n");
|
|
MppDecVprocCtxImpl *p = (MppDecVprocCtxImpl *)ctx;
|
|
if (p->thd)
|
p->thd->start();
|
else
|
mpp_err("failed to start dec vproc thread\n");
|
|
vproc_dbg_func("out\n");
|
return MPP_OK;
|
}
|
|
MPP_RET dec_vproc_stop(MppDecVprocCtx ctx)
|
{
|
if (NULL == ctx) {
|
mpp_err_f("found NULL input\n");
|
return MPP_ERR_NULL_PTR;
|
}
|
vproc_dbg_func("in\n");
|
|
MppDecVprocCtxImpl *p = (MppDecVprocCtxImpl *)ctx;
|
|
if (p->thd)
|
p->thd->stop();
|
else
|
mpp_err("failed to stop dec vproc thread\n");
|
|
vproc_dbg_func("out\n");
|
return MPP_OK;
|
}
|
|
MPP_RET dec_vproc_signal(MppDecVprocCtx ctx)
|
{
|
if (NULL == ctx) {
|
mpp_err_f("found NULL input\n");
|
return MPP_ERR_NULL_PTR;
|
}
|
vproc_dbg_func("in\n");
|
|
MppDecVprocCtxImpl *p = (MppDecVprocCtxImpl *)ctx;
|
if (p->thd) {
|
p->thd->lock();
|
p->thd->signal();
|
p->thd->unlock();
|
}
|
|
vproc_dbg_func("out\n");
|
return MPP_OK;
|
}
|
|
MPP_RET dec_vproc_reset(MppDecVprocCtx ctx)
|
{
|
if (NULL == ctx) {
|
mpp_err_f("found NULL input\n");
|
return MPP_ERR_NULL_PTR;
|
}
|
vproc_dbg_func("in\n");
|
|
MppDecVprocCtxImpl *p = (MppDecVprocCtxImpl *)ctx;
|
if (p->thd) {
|
MppThread *thd = p->thd;
|
|
vproc_dbg_reset("reset contorl start\n");
|
// wait reset finished
|
thd->lock();
|
thd->lock(THREAD_CONTROL);
|
p->reset = 1;
|
thd->unlock(THREAD_CONTROL);
|
thd->signal();
|
thd->unlock();
|
|
vproc_dbg_reset("reset contorl wait\n");
|
sem_wait(&p->reset_sem);
|
vproc_dbg_reset("reset contorl done\n");
|
|
mpp_assert(p->reset == 0);
|
}
|
|
vproc_dbg_func("out\n");
|
return MPP_OK;
|
}
|
