/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __HAL_VP8E_BASE_H__
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#define __HAL_VP8E_BASE_H__
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#include "mpp_device.h"
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#include "hal_enc_task.h"
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#include "vp8e_syntax.h"
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#include "hal_vp8e_entropy.h"
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#define VP8_PROB_COUNT_MV_OFFSET (222)
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#define VP8_PROB_COUNT_BUF_SIZE (244*2)
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#define mask_7b (RK_U32)0x0000007F
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#define INPUT_YUV420PLANAR 0x00
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#define INPUT_YUV420SEMIPLANAR 0x01
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#define INPUT_YUYV422INTERLEAVED 0x02
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#define INPUT_UYVY422INTERLEAVED 0x03
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#define INPUT_RGB565 0x04
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#define INPUT_RGB555 0x05
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#define INPUT_RGB444 0x06
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#define INPUT_RGB888 0x07
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#define INPUT_RGB101010 0x08
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#define INPUT_YUYV422TILED 0x09
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#define IVF_HDR_BYTES 32
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#define IVF_FRM_BYTES 12
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typedef enum vp8_frm_type_e {
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VP8E_FRM_KEY = 0,
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VP8E_FRM_P,
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} Vp8FrmType;
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typedef struct vp8e_hal_vpu_buffers_t {
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MppBufferGroup hw_buf_grp;
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MppBuffer hw_rec_buf[2];
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MppBuffer hw_luma_buf;
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MppBuffer hw_cbcr_buf[2];
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MppBuffer hw_cabac_table_buf;
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MppBuffer hw_size_table_buf;
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MppBuffer hw_segment_map_buf;
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MppBuffer hw_prob_count_buf;
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MppBuffer hw_mv_output_buf;
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MppBuffer hw_out_buf;
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} Vp8eVpuBuf;
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#define PENALTY_TABLE_SIZE 128
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/**
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* pps definition
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*/
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#define SGM_CNT 4
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typedef struct sgm_t {
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RK_U8 map_modified;
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RK_S32 id_cnt[SGM_CNT];
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} Sgm;
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typedef struct {
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Sgm sgm;
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RK_S32 qp;
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RK_U8 segment_enabled;
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RK_S32 qp_sgm[SGM_CNT];
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RK_S32 level_sgm[SGM_CNT];
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} Pps;
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typedef struct {
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Pps *store;
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RK_S32 size;
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Pps *pps;
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Pps *prev_pps;
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RK_S32 qp_sgm[SGM_CNT];
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RK_S32 level_sgm[SGM_CNT];
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} Vp8ePps;
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/**
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* QP definition
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*/
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#define QINDEX_RANGE 128
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typedef struct {
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RK_S32 quant[2];
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RK_S32 zbin[2];
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RK_S32 round[2];
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RK_S32 dequant[2];
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} Vp8eQp;
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/**
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* sps definition
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*/
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typedef struct vp8e_sps_t {
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RK_S32 pic_width_in_mbs;
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RK_S32 pic_height_in_mbs;
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RK_S32 pic_width_in_pixel;
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RK_S32 pic_height_in_pixel;
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RK_S32 horizontal_scaling;
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RK_S32 vertical_scaling;
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RK_S32 color_type;
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RK_S32 clamp_type;
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RK_S32 dct_partitions;
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RK_S32 partition_cnt;
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RK_S32 profile;
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RK_S32 filter_type;
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RK_S32 filter_level;
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RK_S32 filter_sharpness;
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RK_S32 quarter_pixel_mv;
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RK_S32 split_mv;
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RK_S32 sing_bias[3];
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RK_S32 auto_filter_level;
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RK_S32 auto_filter_sharpness;
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RK_U8 filter_delta_enable;
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RK_S32 mode_delta[4];
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RK_S32 old_mode_delta[4];
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RK_S32 ref_delta[4];
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RK_S32 old_ref_delta[4];
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RK_S32 refresh_entropy;
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} Vp8eSps;
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/**
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* entropy definition
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*/
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typedef struct vp8e_hal_entropy_t {
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RK_S32 skip_false_prob;
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RK_S32 intra_prob;
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RK_S32 last_prob;
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RK_S32 gf_prob;
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RK_S32 kf_y_mode_prob[4];
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RK_S32 y_mode_prob[4];
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RK_S32 kf_uv_mode_prob[3];
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RK_S32 uv_mode_prob[3];
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RK_S32 kf_b_mode_prob[10][10][9];
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RK_S32 b_mode_prob[9];
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RK_S32 coeff_prob[4][8][3][11];
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RK_S32 old_coeff_prob[4][8][3][11];
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RK_S32 mv_ref_prob[4];
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RK_S32 mv_prob[2][19];
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RK_S32 old_mv_prob[2][19];
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RK_S32 sub_mv_partprob[3];
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RK_S32 sub_mv_ref_prob[5][3];
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RK_S32 default_coeff_prob_flag;
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RK_S32 update_coeff_prob_flag;
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RK_S32 segment_prob[3];
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} Vp8eHalEntropy;
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/**
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* picture definition
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*/
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#define REF_FRAME_COUNT 3
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typedef struct {
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RK_S32 lum_width;
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RK_S32 lum_height;
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RK_S32 ch_width;
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RK_S32 ch_height;
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RK_U32 lum;
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RK_U32 cb;
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} HalVp8ePic;
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typedef struct hal_vp8e_refpic_t {
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HalVp8ePic picture;
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Vp8eHalEntropy *entropy;
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RK_S32 poc;
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RK_U8 i_frame;
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RK_U8 p_frame;
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RK_U8 show;
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RK_U8 ipf;
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RK_U8 arf;
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RK_U8 grf;
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RK_U8 search;
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struct hal_vp8e_refpic_t *refPic;
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} HalVp8eRefPic;
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typedef struct {
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RK_S32 size; /* Amount of allocated reference pictures */
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HalVp8ePic input; /* Input picture */
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HalVp8eRefPic ref_pic[REF_FRAME_COUNT + 1]; /* Reference picture store */
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HalVp8eRefPic ref_pic_list[REF_FRAME_COUNT]; /* Reference picture list */
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HalVp8eRefPic *cur_pic; /* Pointer to picture under reconstruction */
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HalVp8eRefPic *last_pic; /* Last picture */
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} HalVp8ePicBuf;
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typedef struct {
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RK_U32 irq_disable;
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RK_U32 mbs_in_col;
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RK_U32 mbs_in_row;
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RK_U32 rounding_ctrl;
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RK_U32 frame_coding_type;
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RK_U32 coding_type;
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RK_U32 pixels_on_row;
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RK_U32 x_fill;
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RK_U32 y_fill;
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RK_U32 filter_disable;
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RK_U32 enable_cabac;
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RK_U32 input_format;
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RK_U32 input_rotation;
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RK_U32 output_strm_base;
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RK_U32 output_strm_offset;
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RK_U32 output_strm_size;
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RK_U32 first_free_bit;
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RK_U32 strm_start_msb;
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RK_U32 strm_start_lsb;
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RK_U32 size_tbl_base;
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RK_U32 int_slice_ready;
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RK_U32 rec_write_disable;
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RK_U32 recon_img_id;
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RK_U32 internal_img_lum_base_w;
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RK_U32 internal_img_chr_base_w;
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RK_U32 internal_img_lum_base_r[2];
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RK_U32 internal_img_chr_base_r[2];
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RK_U32 input_lum_base;
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RK_U32 input_cb_base;
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RK_U32 input_cb_offset;
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RK_U32 input_cr_base;
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RK_U32 input_cr_offset;
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RK_U32 cp_distance_mbs; //TODO maybe useless
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RK_U32 rlc_count; //TODO read from reg
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RK_U32 qp_sum; //TODO read from reg
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RK_U8 dmv_penalty[PENALTY_TABLE_SIZE];
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RK_U8 dmv_qpel_penalty[PENALTY_TABLE_SIZE];
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RK_U32 input_luma_base_offset;
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RK_U32 input_chroma_base_offset;
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RK_U32 disable_qp_mv;
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RK_U32 vs_next_luma_base;
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RK_U32 vs_mode;
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RK_U32 asic_cfg_reg;
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RK_S32 intra_16_favor;
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RK_S32 prev_mode_favor;
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RK_S32 inter_favor;
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RK_S32 skip_penalty;
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RK_S32 golden_penalty;
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RK_S32 diff_mv_penalty[3];
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RK_U32 mad_count;
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RK_U32 cir_start;
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RK_U32 cir_interval;
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RK_U32 intra_area_top;
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RK_U32 intra_area_left;
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RK_U32 intra_area_bottom;
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RK_U32 intra_area_right;
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RK_U32 roi1_top;
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RK_U32 roi1_left;
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RK_U32 roi1_bottom;
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RK_U32 roi1_right;
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RK_U32 roi2_top;
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RK_U32 roi2_left;
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RK_U32 roi2_bottom;
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RK_U32 roi2_right;
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RK_S32 roi1_delta_qp;
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RK_S32 roi2_delta_qp;
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RK_U32 mv_output_base;
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RK_U32 cabac_tbl_base;
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RK_U32 prob_count_base;
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RK_U32 segment_map_base;
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RK_U16 rgb_coeff_a;
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RK_U16 rgb_coeff_b;
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RK_U16 rgb_coeff_c;
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RK_U16 rgb_coeff_e;
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RK_U16 rgb_coeff_f;
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RK_U8 r_mask_msb;
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RK_U8 g_mask_msb;
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RK_U8 b_mask_msb;
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RK_U32 partition_Base[8];
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RK_U32 partition_offset[8];
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RK_U16 y1_quant_dc[4];
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RK_U16 y1_quant_ac[4];
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RK_U16 y2_quant_dc[4];
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RK_U16 y2_quant_ac[4];
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RK_U16 ch_quant_dc[4];
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RK_U16 ch_quant_ac[4];
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RK_U16 y1_zbin_dc[4];
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RK_U16 y1_zbin_ac[4];
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RK_U16 y2_zbin_dc[4];
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RK_U16 y2_zbin_ac[4];
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RK_U16 ch_zbin_dc[4];
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RK_U16 ch_zbin_ac[4];
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RK_U8 y1_round_dc[4];
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RK_U8 y1_round_ac[4];
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RK_U8 y2_round_dc[4];
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RK_U8 y2_round_ac[4];
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RK_U8 ch_round_dc[4];
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RK_U8 ch_round_ac[4];
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RK_U16 y1_dequant_dc[4];
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RK_U16 y1_dequant_ac[4];
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RK_U16 y2_dequant_dc[4];
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RK_U16 y2_dequant_ac[4];
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RK_U16 ch_dequant_dc[4];
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RK_U16 ch_dequant_ac[4];
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RK_U32 segment_enable;
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RK_U32 segment_map_update;
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RK_U32 mv_ref_idx[2];
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RK_U32 ref2_enable;
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RK_U32 bool_enc_value;
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RK_U32 bool_enc_value_bits;
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RK_U32 bool_enc_range;
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RK_U32 dct_partitions;
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RK_U32 filter_level[4];
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RK_U32 filter_sharpness;
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RK_U32 intra_mode_penalty[4];
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RK_U32 intra_b_mode_penalty[10];
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RK_U32 zero_mv_favor;
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RK_U32 split_mv_mode;
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RK_U32 split_penalty[4];
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RK_S32 lf_ref_delta[4];
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RK_S32 lf_mode_delta[4];
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} Vp8eHwCfg;
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typedef struct hal_vp8e_ctx_s {
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Vp8eFeedback feedback;
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MppDev dev;
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void *regs;
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void *buffers;
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RK_U32 reg_size;
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MppEncCfgSet *cfg;
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Vp8eSps sps;
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Vp8ePps ppss;
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//TODO remove vp8_rc
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Vp8eRc *rc;
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Vp8eHwCfg hw_cfg;
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Vp8eHalEntropy entropy;
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HalVp8ePicBuf picbuf;
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Vp8ePutBitBuf bitbuf[4];
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Vp8eQp qp_y1[QINDEX_RANGE];
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Vp8eQp qp_y2[QINDEX_RANGE];
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Vp8eQp qp_ch[QINDEX_RANGE];
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RK_U32 prev_frame_lost;
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RK_U32 *p_out_buf[9];
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RK_U32 stream_size[9];
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RK_U32 frame_size;
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RK_U32 buffer_ready;
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RK_U64 frame_cnt;
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RK_U8 last_frm_intra;
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Vp8FrmType frame_type;
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RK_U32 mb_per_frame;
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RK_U32 mb_per_row;
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RK_U32 mb_per_col;
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} HalVp8eCtx;
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#ifdef __cplusplus
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extern "C" {
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#endif
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MPP_RET hal_vp8e_update_buffers(void *hal, HalEncTask *task);
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MPP_RET hal_vp8e_enc_strm_code(void *hal, HalEncTask *info);
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MPP_RET hal_vp8e_init_qp_table(void *hal);
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MPP_RET hal_vp8e_setup(void *hal);
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MPP_RET hal_vp8e_buf_free(void *hal);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__HAL_VP*E_BASE_H__*/
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