/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __VEPU_COMMON_H__
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#define __VEPU_COMMON_H__
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#include "mpp_frame.h"
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typedef enum VepuFormat_e {
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VEPU_FMT_YUV420PLANAR, //0
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VEPU_FMT_YUV420SEMIPLANAR, //1
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VEPU_FMT_YUYV422INTERLEAVED, //2
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VEPU_FMT_UYVY422INTERLEAVED, //3
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VEPU_FMT_RGB565, //4
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VEPU_FMT_RGB555, //5
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VEPU_FMT_RGB444, //6
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VEPU_FMT_RGB888, //7
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VEPU_FMT_RGB101010, //8
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VEPU_FMT_BUTT, //9
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} VepuFmt;
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typedef struct VepuFormatCfg_t {
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VepuFmt format;
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RK_U8 r_mask;
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RK_U8 g_mask;
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RK_U8 b_mask;
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RK_U8 swap_8_in;
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RK_U8 swap_16_in;
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RK_U8 swap_32_in;
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} VepuFormatCfg;
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typedef struct VepuStrideCfg_t {
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MppFrameFormat fmt;
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RK_S32 not_8_pixel;
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RK_S32 is_pixel_stride;
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RK_U32 width;
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RK_U32 stride;
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RK_U32 pixel_stride;
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RK_U32 pixel_size;
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} VepuStrideCfg;
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typedef struct VepuOffsetCfg_t {
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/* input parameter */
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MppFrameFormat fmt;
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/* width / height by pixel */
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RK_U32 width;
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RK_U32 height;
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/* stride by byte */
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RK_U32 hor_stride;
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RK_U32 ver_stride;
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/* offset by pixel */
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RK_U32 offset_x;
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RK_U32 offset_y;
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/* output parameter */
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/* offset by byte */
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RK_U32 offset_byte[3];
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/* offset by pixel */
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RK_U32 offset_pixel[3];
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} VepuOffsetCfg;
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#ifdef __cplusplus
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extern "C" {
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#endif
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MPP_RET get_vepu_fmt(VepuFormatCfg *cfg, MppFrameFormat format);
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RK_U32 get_vepu_pixel_stride(VepuStrideCfg *cfg, RK_U32 width,
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RK_U32 stride, MppFrameFormat fmt);
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MPP_RET get_vepu_offset_cfg(VepuOffsetCfg *cfg);
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#ifdef __cplusplus
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}
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#endif
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#endif
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