/*
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* Copyright 2016 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define MODULE_TAG "mpp_rc"
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#include <math.h>
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#include <memory.h>
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#include "mpp_env.h"
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#include "mpp_mem.h"
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#include "mpp_common.h"
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#include "mpp_rc.h"
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#define MPP_RC_DBG_FUNCTION (0x00000001)
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#define MPP_RC_DBG_BPS (0x00000010)
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#define MPP_RC_DBG_RC (0x00000020)
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#define MPP_RC_DBG_CFG (0x00000100)
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#define MPP_RC_DBG_RECORD (0x00001000)
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#define MPP_RC_DBG_VBV (0x00002000)
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#define mpp_rc_dbg(flag, fmt, ...) _mpp_dbg(mpp_rc_debug, flag, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_f(flag, fmt, ...) _mpp_dbg_f(mpp_rc_debug, flag, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_func(fmt, ...) mpp_rc_dbg_f(MPP_RC_DBG_FUNCTION, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_bps(fmt, ...) mpp_rc_dbg(MPP_RC_DBG_BPS, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_rc(fmt, ...) mpp_rc_dbg(MPP_RC_DBG_RC, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_cfg(fmt, ...) mpp_rc_dbg(MPP_RC_DBG_CFG, fmt, ## __VA_ARGS__)
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#define mpp_rc_dbg_vbv(fmt, ...) mpp_rc_dbg(MPP_RC_DBG_VBV, fmt, ## __VA_ARGS__)
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#define SIGN(a) ((a) < (0) ? (-1) : (1))
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#define DIV(a, b) (((a) + (SIGN(a) * (b)) / 2) / (b))
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static RK_U32 mpp_rc_debug = 0;
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MPP_RET mpp_data_init(MppData **data, RK_S32 size)
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{
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if (NULL == data || size <= 0) {
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mpp_err_f("invalid data %p size %d\n", data, size);
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return MPP_ERR_NULL_PTR;
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}
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*data = NULL;
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MppData *p = mpp_malloc_size(MppData, sizeof(MppData) + sizeof(RK_S32) * size);
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if (NULL == p) {
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mpp_err_f("malloc size %d failed\n", size);
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return MPP_ERR_MALLOC;
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}
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p->size = size;
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p->len = 0;
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p->pos = 0;
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p->val = (RK_S32 *)(p + 1);
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*data = p;
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return MPP_OK;
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}
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void mpp_data_deinit(MppData *p)
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{
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if (p)
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mpp_free(p);
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}
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void mpp_data_update(MppData *p, RK_S32 val)
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{
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mpp_assert(p);
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p->val[p->pos] = val;
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if (++p->pos >= p->size)
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p->pos = 0;
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if (p->len < p->size)
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p->len++;
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}
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RK_S32 mpp_data_avg(MppData *p, RK_S32 len, RK_S32 num, RK_S32 denorm)
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{
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mpp_assert(p);
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RK_S32 i;
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RK_S32 sum = 0;
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RK_S32 pos = p->pos;
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if (!p->len)
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return 0;
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if (len < 0 || len > p->len)
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len = p->len;
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if (num == denorm) {
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i = len;
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while (i--) {
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if (pos)
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pos--;
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else
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pos = p->len - 1;
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sum += p->val[pos];
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}
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} else {
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/* This case is not used so far, but may be useful in the future */
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mpp_assert(num > denorm);
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RK_S32 acc_num = num;
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RK_S32 acc_denorm = denorm;
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i = len - 1;
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sum = p->val[--pos];
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while (i--) {
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if (pos)
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pos--;
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else
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pos = p->len - 1;
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sum += p->val[pos] * acc_num / acc_denorm;
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acc_num *= num;
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acc_denorm *= denorm;
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}
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}
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return DIV(sum, len);
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}
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void mpp_pid_reset(MppPIDCtx *p)
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{
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p->p = 0;
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p->i = 0;
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p->d = 0;
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p->count = 0;
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}
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void mpp_pid_set_param(MppPIDCtx *ctx, RK_S32 coef_p, RK_S32 coef_i, RK_S32 coef_d, RK_S32 div, RK_S32 len)
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{
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ctx->coef_p = coef_p;
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ctx->coef_i = coef_i;
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ctx->coef_d = coef_d;
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ctx->div = div;
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ctx->len = len;
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ctx->count = 0;
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mpp_rc_dbg_rc("RC: pid ctx %p coef: P %d I %d D %d div %d len %d\n",
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ctx, coef_p, coef_i, coef_d, div, len);
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}
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void mpp_pid_update(MppPIDCtx *ctx, RK_S32 val)
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{
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mpp_rc_dbg_rc("RC: pid ctx %p update val %d\n", ctx, val);
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mpp_rc_dbg_rc("RC: pid ctx %p before update P %d I %d D %d\n", ctx, ctx->p, ctx->i, ctx->d);
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ctx->d = val - ctx->p; /* Derivative */
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ctx->i = val + ctx->i; /* Integral */
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ctx->p = val; /* Proportional */
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mpp_rc_dbg_rc("RC: pid ctx %p after update P %d I %d D %d\n", ctx, ctx->p, ctx->i, ctx->d);
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ctx->count++;
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/*
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* pid control is a short time control, it needs periodically reset
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*/
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if (ctx->count >= ctx->len)
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mpp_pid_reset(ctx);
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}
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RK_S32 mpp_pid_calc(MppPIDCtx *p)
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{
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RK_S32 a = p->p * p->coef_p + p->i * p->coef_i + p->d * p->coef_d;
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RK_S32 b = p->div;
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mpp_rc_dbg_rc("RC: pid ctx %p p %10d coef %d\n", p, p->p, p->coef_p);
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mpp_rc_dbg_rc("RC: pid ctx %p i %10d coef %d\n", p, p->i, p->coef_i);
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mpp_rc_dbg_rc("RC: pid ctx %p d %10d coef %d\n", p, p->d, p->coef_d);
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mpp_rc_dbg_rc("RC: pid ctx %p a %10d b %d\n", p, a, b);
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return DIV(a, b);
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}
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MPP_RET mpp_rc_param_ops(struct list_head *head, RK_U32 frm_cnt,
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RC_PARAM_OPS ops, void *arg)
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{
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MPP_RET ret = MPP_OK;
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if (mpp_rc_debug & MPP_RC_DBG_RECORD) {
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RecordNode *pos, *n;
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RK_U32 found_match = 0;
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list_for_each_entry_safe(pos, n, head, RecordNode, list) {
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if (frm_cnt == pos->frm_cnt) {
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found_match = 1;
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break;
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}
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}
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if (!found_match) {
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mpp_err("frame %d is not found in list_head %p!\n", frm_cnt, head);
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ret = MPP_NOK;
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} else {
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switch (ops) {
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case RC_RECORD_REAL_BITS : {
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pos->real_bits = *((RK_U32*)arg);
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} break;
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case RC_RECORD_QP_SUM : {
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pos->qp_sum = *((RK_S32*)arg);
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} break;
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case RC_RECORD_QP_MIN : {
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pos->qp_min = *((RK_S32*)arg);
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} break;
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case RC_RECORD_QP_MAX : {
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pos->qp_max = *((RK_S32*)arg);
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} break;
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case RC_RECORD_WIN_LEN : {
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pos->wlen = *((RK_S32*)arg);
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} break;
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case RC_RECORD_SET_QP : {
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pos->set_qp = *((RK_S32*)arg);
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} break;
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case RC_RECORD_REAL_QP : {
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pos->real_qp = *((RK_S32*)arg);
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} break;
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case RC_RECORD_SSE_SUM : {
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pos->sse_sum = *((RK_S64*)arg);
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} break;
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default : {
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mpp_err("frame %d found invalid operation code %d\n", frm_cnt, ops);
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ret = MPP_NOK;
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}
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}
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}
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}
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return ret;
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}
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