/*
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* Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include "sun8i_csc.h"
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#include "sun8i_mixer.h"
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static const u32 ccsc_base[2][2] = {
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{CCSC00_OFFSET, CCSC01_OFFSET},
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{CCSC10_OFFSET, CCSC11_OFFSET},
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};
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/*
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* Factors are in two's complement format, 10 bits for fractinal part.
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* First tree values in each line are multiplication factor and last
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* value is constant, which is added at the end.
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*/
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static const u32 yuv2rgb[] = {
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0x000004A8, 0x00000000, 0x00000662, 0xFFFC845A,
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0x000004A8, 0xFFFFFE6F, 0xFFFFFCBF, 0x00021DF4,
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0x000004A8, 0x00000813, 0x00000000, 0xFFFBAC4A,
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};
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static const u32 yvu2rgb[] = {
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0x000004A8, 0x00000662, 0x00000000, 0xFFFC845A,
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0x000004A8, 0xFFFFFCBF, 0xFFFFFE6F, 0x00021DF4,
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0x000004A8, 0x00000000, 0x00000813, 0xFFFBAC4A,
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};
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static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
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enum sun8i_csc_mode mode)
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{
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const u32 *table;
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int i, data;
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switch (mode) {
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case SUN8I_CSC_MODE_YUV2RGB:
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table = yuv2rgb;
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break;
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case SUN8I_CSC_MODE_YVU2RGB:
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table = yvu2rgb;
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break;
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default:
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DRM_WARN("Wrong CSC mode specified.\n");
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return;
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}
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for (i = 0; i < 12; i++) {
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data = table[i];
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/* For some reason, 0x200 must be added to constant parts */
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if (((i + 1) & 3) == 0)
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data += 0x200;
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regmap_write(map, SUN8I_CSC_COEFF(base, i), data);
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}
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}
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static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable)
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{
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u32 val;
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if (enable)
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val = SUN8I_CSC_CTRL_EN;
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else
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val = 0;
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regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val);
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}
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void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
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enum sun8i_csc_mode mode)
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{
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u32 base;
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base = ccsc_base[mixer->cfg->ccsc][layer];
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sun8i_csc_set_coefficients(mixer->engine.regs, base, mode);
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}
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void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable)
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{
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u32 base;
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base = ccsc_base[mixer->cfg->ccsc][layer];
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sun8i_csc_enable(mixer->engine.regs, base, enable);
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}
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