From a243628639e12a4bd0a737eac78a12ed240cd137 Mon Sep 17 00:00:00 2001
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From: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
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Date: Mon, 18 Jul 2016 10:40:16 -0400
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Subject: [PATCH] Arcturus uCP1020 BSP support
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The uCP1020 product family (ucp1020) is an Arcturus Networks Inc.
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System on Modules product featuring a NXP QorIQ P1020 CPU,
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optionally populated with 1 or 2 Gig-Ethernet PHYs,
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DDR3, NOR Flash, eMMC NAND Flash and/or SPI Flash.
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Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
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Signed-off-by: Michael Durrant <arcsupport@arcturusnetworks.com>
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---
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arch/powerpc/boot/dts/ucp1020.dts | 87 ++++++++++++
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arch/powerpc/boot/dts/ucp1020.dtsi | 211 ++++++++++++++++++++++++++++++
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arch/powerpc/platforms/85xx/Kconfig | 7 +
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arch/powerpc/platforms/85xx/Makefile | 1 +
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arch/powerpc/platforms/85xx/ucp1020_som.c | 92 +++++++++++++
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5 files changed, 398 insertions(+)
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create mode 100644 arch/powerpc/boot/dts/ucp1020.dts
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create mode 100644 arch/powerpc/boot/dts/ucp1020.dtsi
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create mode 100644 arch/powerpc/platforms/85xx/ucp1020_som.c
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diff --git a/arch/powerpc/boot/dts/ucp1020.dts b/arch/powerpc/boot/dts/ucp1020.dts
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new file mode 100644
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index 0000000..291e70a
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--- /dev/null
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+++ b/arch/powerpc/boot/dts/ucp1020.dts
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@@ -0,0 +1,87 @@
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+/*
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+ * uCP1020 Tree Source (32-bit address map)
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+ *
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+ * Copyright 2013-2016 Arcturus Networks Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * * Neither the name of Freescale Semiconductor nor the
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+ * names of its contributors may be used to endorse or promote products
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+ * derived from this software without specific prior written permission.
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+ *
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+/include/ "fsl/p1020si-pre.dtsi"
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+/ {
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+ model = "arcturus,uCP1020";
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+ compatible = "arcturus,uCP1020";
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+
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+ memory {
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+ device_type = "memory";
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+ };
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+
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+ lbc: localbus@ffe05000 {
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+ reg = <0 0xffe05000 0 0x1000>;
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+
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+ /* NOR Flash */
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+ ranges = <0x0 0x0 0x0 0xec000000 0x04000000>;
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+ };
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+
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+ soc: soc@ffe00000 {
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+ ranges = <0x0 0x0 0xffe00000 0x100000>;
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+ };
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+
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+ pci0: pcie@ffe09000 {
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+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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+ reg = <0 0xffe09000 0 0x1000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0xa0000000
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+ 0x2000000 0x0 0xa0000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+
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+ pci1: pcie@ffe0a000 {
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+ reg = <0 0xffe0a000 0 0x1000>;
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+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0x80000000
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+ 0x2000000 0x0 0x80000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+};
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+
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+/include/ "ucp1020.dtsi"
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+/include/ "fsl/p1020si-post.dtsi"
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diff --git a/arch/powerpc/boot/dts/ucp1020.dtsi b/arch/powerpc/boot/dts/ucp1020.dtsi
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new file mode 100644
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index 0000000..7cff949
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--- /dev/null
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+++ b/arch/powerpc/boot/dts/ucp1020.dtsi
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@@ -0,0 +1,211 @@
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+/*
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+ * uCP1020 Device Tree Source stub (no addresses or top-level ranges)
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+ *
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+ * Copyright 2013-2016 Arcturus Networks Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
|
+ * notice, this list of conditions and the following disclaimer.
|
+ * * Redistributions in binary form must reproduce the above copyright
|
+ * notice, this list of conditions and the following disclaimer in the
|
+ * documentation and/or other materials provided with the distribution.
|
+ * * Neither the name of Freescale Semiconductor nor the
|
+ * names of its contributors may be used to endorse or promote products
|
+ * derived from this software without specific prior written permission.
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+ *
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+&lbc {
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+ nor@0,0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "cfi-flash";
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+ reg = <0x0 0x0 0x04000000>;
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+ bank-width = <2>;
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+ device-width = <1>;
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+
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+ partition@100000 {
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+ /* 7MB - PART 0 */
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+ reg = <0x00100000 0x00700000>;
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+ label = "0";
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+ };
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+
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+ partition@800000 {
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+ /* 32MB - PART 1 */
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+ reg = <0x0800000 0x02000000>;
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+ label = "1";
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+ };
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+
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+ partition@2800000 {
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+ /* 8MB - PART 2 */
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+ reg = <0x02800000 0x00800000>;
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+ label = "2";
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+ };
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+
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+ partition@3000000 {
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+ /* (16MB - 512K) - PART 3 JFFS 2 */
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+ reg = <0x03000000 0x00f80000>;
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+ label = "3";
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+ };
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+
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+ partition@0 {
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+ /* 512KB - bootloader[u-boot, uCbootloader] */
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+ reg = <0x0 0x00080000>;
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+ label = "BOOT_SPI";
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+ };
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+
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+ partition@3f80000 {
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+ /* 512KB - bootloade NOR r[u-boot, uCbootloader] */
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+ reg = <0x03f80000 0x00080000>;
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+ label = "B";
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+ };
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+
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+ partition@80000 {
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+ /* 256KB - bootloaders environment (uCenv) */
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+ reg = <0x00080000 0x00040000>;
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+
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+ label = "E";
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+ };
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+
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+ partition@C0000 {
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+ /* 256KB - bootloaders environment (u-boot) */
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+ reg = <0x000C0000 0x00040000>;
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+ label = "UENV";
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+ };
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+ };
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+};
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+
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+&soc {
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+ i2c@3000 {
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+ spoc@14 {
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+ compatible = "conexant,cx2070x";
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+ reg = <0x14>;
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+ };
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+ };
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+
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+ i2c@3100 {
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+ dtt@4C {
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+ compatible = "national,lm90";
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+ reg = <0x4C>;
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+ };
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+ };
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+
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+ spi@7000 {
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "winbond,w25q80bl";
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+ reg = <0>;
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+ spi-max-frequency = <40000000>; /* input clock */
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+
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+ partition@0 {
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+ label = "SPI MBR";
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+ reg = <0x00000000 0x00002000>;
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+ read-only;
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+ };
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+ partition@2000 {
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+ label = "SPI ENV";
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+ reg = <0x00002000 0x00006000>;
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+ read-only;
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+ };
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+ partition@8000 {
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+ label = "SPI FS";
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+ reg = <0x00008000 0x000F8000>;
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+ };
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+ };
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+ flash@3 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spansion,s25fl008k";
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+ reg = <3>;
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+ spi-max-frequency = <40000000>; /* input clock */
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+ partition@0 {
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+ label = "SPI USER";
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+ reg = <0x00000000 0x00100000>;
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+ };
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+ };
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+ };
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+
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+ usb@22000 {
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+ phy_type = "ulpi";
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+ dr_mode = "host";
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+ };
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+
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+ mdio@24000 {
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+ phy0: ethernet-phy@4 {
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+ interrupt-parent = <&mpic>;
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+ interrupts = <4 1>;
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+ reg = <0x04>;
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+ };
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+
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+ phy1: ethernet-phy@6 {
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+ interrupt-parent = <&mpic>;
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+ interrupts = <8 1>;
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+ reg = <0x6>;
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+ };
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+ };
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+
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+ enet0: ethernet@b0000 {
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+ phy-handle = <&phy0>;
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+ phy-connection-type = "rgmii-id";
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+ };
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+
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+ enet1: ethernet@b1000 {
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+ status = "disabled";
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+ };
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+
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+ enet2: ethernet@b2000 {
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+ phy-handle = <&phy1>;
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+ phy-connection-type = "rgmii-id";
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+ };
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+
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+ gpio0: gpio@f000 {
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+ compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
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+ reg = <0xf000 0x1000>;
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+ interrupts = <47 2>;
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+ interrupt-parent = <&mpic>;
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+ #gpio-cells = <2>;
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+ gpio-controller;
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+ gpio5 {
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+ label = "led1"; /* LED15 */
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+ gpios = <&gpio0 5 0>;
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+ };
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+ gpio12 {
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+ label = "led2"; /* LED16 */
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+ gpios = <&gpio0 12 0>;
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+ };
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+ gpio13 {
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+ label = "led3"; /* LED17 */
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+ gpios = <&gpio0 13 0>;
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+ };
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+ gpio7 {
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+ label = "led4"; /* LED18 */
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+ gpios = <&gpio0 7 0>;
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+ };
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+ gpio6 {
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+ label = "led5"; /* LED19 */
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+ gpios = <&gpio0 6 0>;
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+ };
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+ };
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+};
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diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
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index 2fb4b24..81a944f 100644
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--- a/arch/powerpc/platforms/85xx/Kconfig
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+++ b/arch/powerpc/platforms/85xx/Kconfig
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@@ -241,6 +241,13 @@ config SGY_CTS1000
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help
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Enable this to support functionality in Servergy's CTS-1000 systems.
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+config UCP1020_SOM
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+ bool "Arcturus uCP1020 Rev.1.3 System on Module"
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+ select DEFAULT_UIMAGE
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+ help
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+ This option enables support for the Arcturus Networks Inc.
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+ uCP1020 System on Module.
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+
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config MVME2500
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bool "Artesyn MVME2500"
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select DEFAULT_UIMAGE
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diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
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index 1fe7fb9..84f2b9a 100644
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--- a/arch/powerpc/platforms/85xx/Makefile
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+++ b/arch/powerpc/platforms/85xx/Makefile
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@@ -31,4 +31,5 @@ obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
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obj-$(CONFIG_GE_IMP3A) += ge_imp3a.o
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obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
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obj-$(CONFIG_SGY_CTS1000) += sgy_cts1000.o
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+obj-$(CONFIG_UCP1020_SOM) += ucp1020_som.o
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obj-$(CONFIG_MVME2500) += mvme2500.o
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diff --git a/arch/powerpc/platforms/85xx/ucp1020_som.c b/arch/powerpc/platforms/85xx/ucp1020_som.c
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new file mode 100644
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index 0000000..777e8ad
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--- /dev/null
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+++ b/arch/powerpc/platforms/85xx/ucp1020_som.c
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@@ -0,0 +1,92 @@
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+/*
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+ * Arcturus Networks Inc. uCP1020 module Setup
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+ *
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+ * Copyright 2014-2016 Arcturus Networks Inc.
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+ *
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+ * by Oleksandr G Zhadan & Michael Durrant (www.ArcturusNetworks.com)
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+#include <linux/stddef.h>
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+#include <linux/kernel.h>
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+#include <linux/pci.h>
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+#include <linux/kdev_t.h>
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+#include <linux/delay.h>
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+#include <linux/seq_file.h>
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+#include <linux/interrupt.h>
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+#include <linux/of_platform.h>
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+
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+#include <asm/time.h>
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+#include <asm/machdep.h>
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+#include <asm/pci-bridge.h>
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+#include <mm/mmu_decl.h>
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+#include <asm/prom.h>
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+#include <asm/udbg.h>
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+#include <asm/mpic.h>
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+#include <asm/fsl_guts.h>
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+
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+#include <sysdev/fsl_soc.h>
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+#include <sysdev/fsl_pci.h>
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+#include "smp.h"
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+
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+#include "mpc85xx.h"
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+
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+void __init ucp1020_som_pic_init(void)
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+{
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+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
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+ MPIC_SINGLE_DEST_CPU,
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+ 0, 256, " OpenPIC ");
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+
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+ BUG_ON(mpic == NULL);
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+
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+ mpic_init(mpic);
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+}
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+
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+/*
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+ * Setup the architecture
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+ */
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+static void __init ucp1020_som_setup_arch(void)
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+{
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+ if (ppc_md.progress)
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+ ppc_md.progress("uCP1020_SoM_setup_arch()", 0);
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+
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+ mpc85xx_smp_init();
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+
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+ fsl_pci_assign_primary();
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+ pr_info("\n\t%s (http://www.arcturusnetworks.com)\n", ppc_md.name);
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+}
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+
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+machine_arch_initcall(ucp1020, mpc85xx_common_publish_devices);
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+machine_arch_initcall(ucp1020, swiotlb_setup_bus_notifier);
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+
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+/*
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+ * Called very early, device-tree isn't unflattened
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+ */
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+static int __init ucp1020_probe(void)
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+{
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+ unsigned long root = of_get_flat_dt_root();
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+
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+ if (of_flat_dt_is_compatible(root, "arcturus,uCP1020"))
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+ return 1;
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+ return 0;
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+}
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+
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+define_machine(ucp1020) {
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+ .name = "uCP1020 SoM - Arcturus Networks Inc.",
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+ .probe = ucp1020_probe,
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+ .setup_arch = ucp1020_som_setup_arch,
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+ .init_IRQ = ucp1020_som_pic_init,
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+#ifdef CONFIG_PCI
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+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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+#endif
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+ .get_irq = mpic_get_irq,
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+ .restart = fsl_rstcr_restart,
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+ .calibrate_decr = generic_calibrate_decr,
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+#ifdef DEBUG
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+ .progress = udbg_progress,
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+#endif
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+};
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--
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2.1.4
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