/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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*
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* (C) COPYRIGHT 2020-2021 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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#ifndef _UAPI_BASE_CSF_KERNEL_H_
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#define _UAPI_BASE_CSF_KERNEL_H_
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#include <linux/types.h>
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/* Memory allocation, access/hint flags.
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*
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* See base_mem_alloc_flags.
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*/
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/* IN */
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/* Read access CPU side
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*/
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#define BASE_MEM_PROT_CPU_RD ((base_mem_alloc_flags)1 << 0)
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/* Write access CPU side
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*/
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#define BASE_MEM_PROT_CPU_WR ((base_mem_alloc_flags)1 << 1)
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/* Read access GPU side
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*/
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#define BASE_MEM_PROT_GPU_RD ((base_mem_alloc_flags)1 << 2)
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/* Write access GPU side
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*/
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#define BASE_MEM_PROT_GPU_WR ((base_mem_alloc_flags)1 << 3)
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/* Execute allowed on the GPU side
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*/
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#define BASE_MEM_PROT_GPU_EX ((base_mem_alloc_flags)1 << 4)
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/* Will be permanently mapped in kernel space.
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* Flag is only allowed on allocations originating from kbase.
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*/
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#define BASEP_MEM_PERMANENT_KERNEL_MAPPING ((base_mem_alloc_flags)1 << 5)
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/* The allocation will completely reside within the same 4GB chunk in the GPU
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* virtual space.
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* Since this flag is primarily required only for the TLS memory which will
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* not be used to contain executable code and also not used for Tiler heap,
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* it can't be used along with BASE_MEM_PROT_GPU_EX and TILER_ALIGN_TOP flags.
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*/
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#define BASE_MEM_GPU_VA_SAME_4GB_PAGE ((base_mem_alloc_flags)1 << 6)
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/* Userspace is not allowed to free this memory.
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* Flag is only allowed on allocations originating from kbase.
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*/
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#define BASEP_MEM_NO_USER_FREE ((base_mem_alloc_flags)1 << 7)
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#define BASE_MEM_RESERVED_BIT_8 ((base_mem_alloc_flags)1 << 8)
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/* Grow backing store on GPU Page Fault
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*/
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#define BASE_MEM_GROW_ON_GPF ((base_mem_alloc_flags)1 << 9)
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/* Page coherence Outer shareable, if available
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*/
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#define BASE_MEM_COHERENT_SYSTEM ((base_mem_alloc_flags)1 << 10)
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/* Page coherence Inner shareable
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*/
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#define BASE_MEM_COHERENT_LOCAL ((base_mem_alloc_flags)1 << 11)
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/* IN/OUT */
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/* Should be cached on the CPU, returned if actually cached
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*/
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#define BASE_MEM_CACHED_CPU ((base_mem_alloc_flags)1 << 12)
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/* IN/OUT */
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/* Must have same VA on both the GPU and the CPU
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*/
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#define BASE_MEM_SAME_VA ((base_mem_alloc_flags)1 << 13)
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/* OUT */
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/* Must call mmap to acquire a GPU address for the alloc
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*/
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#define BASE_MEM_NEED_MMAP ((base_mem_alloc_flags)1 << 14)
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/* IN */
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/* Page coherence Outer shareable, required.
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*/
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#define BASE_MEM_COHERENT_SYSTEM_REQUIRED ((base_mem_alloc_flags)1 << 15)
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/* Protected memory
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*/
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#define BASE_MEM_PROTECTED ((base_mem_alloc_flags)1 << 16)
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/* Not needed physical memory
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*/
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#define BASE_MEM_DONT_NEED ((base_mem_alloc_flags)1 << 17)
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/* Must use shared CPU/GPU zone (SAME_VA zone) but doesn't require the
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* addresses to be the same
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*/
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#define BASE_MEM_IMPORT_SHARED ((base_mem_alloc_flags)1 << 18)
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/* CSF event memory
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*
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* If Outer shareable coherence is not specified or not available, then on
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* allocation kbase will automatically use the uncached GPU mapping.
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* There is no need for the client to specify BASE_MEM_UNCACHED_GPU
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* themselves when allocating memory with the BASE_MEM_CSF_EVENT flag.
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*
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* This memory requires a permanent mapping
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*
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* See also kbase_reg_needs_kernel_mapping()
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*/
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#define BASE_MEM_CSF_EVENT ((base_mem_alloc_flags)1 << 19)
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#define BASE_MEM_RESERVED_BIT_20 ((base_mem_alloc_flags)1 << 20)
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/* Should be uncached on the GPU, will work only for GPUs using AARCH64 mmu
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* mode. Some components within the GPU might only be able to access memory
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* that is GPU cacheable. Refer to the specific GPU implementation for more
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* details. The 3 shareability flags will be ignored for GPU uncached memory.
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* If used while importing USER_BUFFER type memory, then the import will fail
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* if the memory is not aligned to GPU and CPU cache line width.
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*/
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#define BASE_MEM_UNCACHED_GPU ((base_mem_alloc_flags)1 << 21)
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/*
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* Bits [22:25] for group_id (0~15).
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*
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* base_mem_group_id_set() should be used to pack a memory group ID into a
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* base_mem_alloc_flags value instead of accessing the bits directly.
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* base_mem_group_id_get() should be used to extract the memory group ID from
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* a base_mem_alloc_flags value.
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*/
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#define BASEP_MEM_GROUP_ID_SHIFT 22
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#define BASE_MEM_GROUP_ID_MASK \
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((base_mem_alloc_flags)0xF << BASEP_MEM_GROUP_ID_SHIFT)
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/* Must do CPU cache maintenance when imported memory is mapped/unmapped
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* on GPU. Currently applicable to dma-buf type only.
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*/
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#define BASE_MEM_IMPORT_SYNC_ON_MAP_UNMAP ((base_mem_alloc_flags)1 << 26)
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/* OUT */
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/* Kernel side cache sync ops required */
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#define BASE_MEM_KERNEL_SYNC ((base_mem_alloc_flags)1 << 28)
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/* Number of bits used as flags for base memory management
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*
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* Must be kept in sync with the base_mem_alloc_flags flags
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*/
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#define BASE_MEM_FLAGS_NR_BITS 29
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/* A mask of all the flags which are only valid for allocations within kbase,
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* and may not be passed from user space.
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*/
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#define BASEP_MEM_FLAGS_KERNEL_ONLY \
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(BASEP_MEM_PERMANENT_KERNEL_MAPPING | BASEP_MEM_NO_USER_FREE)
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/* A mask for all output bits, excluding IN/OUT bits.
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*/
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#define BASE_MEM_FLAGS_OUTPUT_MASK BASE_MEM_NEED_MMAP
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/* A mask for all input bits, including IN/OUT bits.
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*/
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#define BASE_MEM_FLAGS_INPUT_MASK \
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(((1 << BASE_MEM_FLAGS_NR_BITS) - 1) & ~BASE_MEM_FLAGS_OUTPUT_MASK)
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/* A mask of all currently reserved flags
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*/
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#define BASE_MEM_FLAGS_RESERVED \
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BASE_MEM_RESERVED_BIT_8 | BASE_MEM_RESERVED_BIT_20
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#define BASEP_MEM_INVALID_HANDLE (0ull << 12)
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#define BASE_MEM_MMU_DUMP_HANDLE (1ull << 12)
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#define BASE_MEM_TRACE_BUFFER_HANDLE (2ull << 12)
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#define BASE_MEM_MAP_TRACKING_HANDLE (3ull << 12)
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#define BASEP_MEM_WRITE_ALLOC_PAGES_HANDLE (4ull << 12)
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/* reserved handles ..-47<<PAGE_SHIFT> for future special handles */
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#define BASEP_MEM_CSF_USER_REG_PAGE_HANDLE (47ul << 12)
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#define BASEP_MEM_CSF_USER_IO_PAGES_HANDLE (48ul << 12)
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#define BASE_MEM_COOKIE_BASE (64ul << 12)
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#define BASE_MEM_FIRST_FREE_ADDRESS ((BITS_PER_LONG << 12) + \
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BASE_MEM_COOKIE_BASE)
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#define KBASE_CSF_NUM_USER_IO_PAGES_HANDLE \
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((BASE_MEM_COOKIE_BASE - BASEP_MEM_CSF_USER_IO_PAGES_HANDLE) >> \
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LOCAL_PAGE_SHIFT)
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/**
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* Valid set of just-in-time memory allocation flags
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*/
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#define BASE_JIT_ALLOC_VALID_FLAGS ((__u8)0)
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/* Flags to pass to ::base_context_init.
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* Flags can be ORed together to enable multiple things.
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*
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* These share the same space as BASEP_CONTEXT_FLAG_*, and so must
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* not collide with them.
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*/
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typedef __u32 base_context_create_flags;
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/* No flags set */
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#define BASE_CONTEXT_CREATE_FLAG_NONE ((base_context_create_flags)0)
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/* Base context is embedded in a cctx object (flag used for CINSTR
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* software counter macros)
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*/
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#define BASE_CONTEXT_CCTX_EMBEDDED ((base_context_create_flags)1 << 0)
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/* Base context is a 'System Monitor' context for Hardware counters.
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*
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* One important side effect of this is that job submission is disabled.
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*/
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#define BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED \
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((base_context_create_flags)1 << 1)
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/* Base context creates a CSF event notification thread.
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*
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* The creation of a CSF event notification thread is conditional but
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* mandatory for the handling of CSF events.
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*/
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#define BASE_CONTEXT_CSF_EVENT_THREAD ((base_context_create_flags)1 << 2)
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/* Bit-shift used to encode a memory group ID in base_context_create_flags
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*/
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#define BASEP_CONTEXT_MMU_GROUP_ID_SHIFT (3)
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/* Bitmask used to encode a memory group ID in base_context_create_flags
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*/
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#define BASEP_CONTEXT_MMU_GROUP_ID_MASK \
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((base_context_create_flags)0xF << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT)
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/* Bitpattern describing the base_context_create_flags that can be
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* passed to the kernel
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*/
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#define BASEP_CONTEXT_CREATE_KERNEL_FLAGS \
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(BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED | \
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BASEP_CONTEXT_MMU_GROUP_ID_MASK)
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/* Bitpattern describing the ::base_context_create_flags that can be
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* passed to base_context_init()
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*/
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#define BASEP_CONTEXT_CREATE_ALLOWED_FLAGS \
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(BASE_CONTEXT_CCTX_EMBEDDED | \
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BASE_CONTEXT_CSF_EVENT_THREAD | \
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BASEP_CONTEXT_CREATE_KERNEL_FLAGS)
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/* Enable additional tracepoints for latency measurements (TL_ATOM_READY,
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* TL_ATOM_DONE, TL_ATOM_PRIO_CHANGE, TL_ATOM_EVENT_POST)
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*/
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#define BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS (1 << 0)
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/* Indicate that job dumping is enabled. This could affect certain timers
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* to account for the performance impact.
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*/
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#define BASE_TLSTREAM_JOB_DUMPING_ENABLED (1 << 1)
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/* Enable KBase tracepoints for CSF builds */
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#define BASE_TLSTREAM_ENABLE_CSF_TRACEPOINTS (1 << 2)
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/* Enable additional CSF Firmware side tracepoints */
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#define BASE_TLSTREAM_ENABLE_CSFFW_TRACEPOINTS (1 << 3)
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#define BASE_TLSTREAM_FLAGS_MASK (BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS | \
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BASE_TLSTREAM_JOB_DUMPING_ENABLED | \
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BASE_TLSTREAM_ENABLE_CSF_TRACEPOINTS | \
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BASE_TLSTREAM_ENABLE_CSFFW_TRACEPOINTS)
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/* Number of pages mapped into the process address space for a bound GPU
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* command queue. A pair of input/output pages and a Hw doorbell page
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* are mapped to enable direct submission of commands to Hw.
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*/
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#define BASEP_QUEUE_NR_MMAP_USER_PAGES ((size_t)3)
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#define BASE_QUEUE_MAX_PRIORITY (15U)
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/* CQS Sync object is an array of __u32 event_mem[2], error field index is 1 */
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#define BASEP_EVENT_VAL_INDEX (0U)
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#define BASEP_EVENT_ERR_INDEX (1U)
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/* The upper limit for number of objects that could be waited/set per command.
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* This limit is now enforced as internally the error inherit inputs are
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* converted to 32-bit flags in a __u32 variable occupying a previously padding
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* field.
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*/
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#define BASEP_KCPU_CQS_MAX_NUM_OBJS ((size_t)32)
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#if MALI_UNIT_TEST
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/**
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* enum base_kcpu_command_type - Kernel CPU queue command type.
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* @BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL: fence_signal,
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* @BASE_KCPU_COMMAND_TYPE_FENCE_WAIT: fence_wait,
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* @BASE_KCPU_COMMAND_TYPE_CQS_WAIT: cqs_wait,
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* @BASE_KCPU_COMMAND_TYPE_CQS_SET: cqs_set,
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* @BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION: cqs_wait_operation,
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* @BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION: cqs_set_operation,
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* @BASE_KCPU_COMMAND_TYPE_MAP_IMPORT: map_import,
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* @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT: unmap_import,
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* @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE: unmap_import_force,
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* @BASE_KCPU_COMMAND_TYPE_JIT_ALLOC: jit_alloc,
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* @BASE_KCPU_COMMAND_TYPE_JIT_FREE: jit_free,
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* @BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND: group_suspend,
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* @BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER: error_barrier,
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* @BASE_KCPU_COMMAND_TYPE_SAMPLE_TIME: sample_time,
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*/
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enum base_kcpu_command_type {
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BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL,
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BASE_KCPU_COMMAND_TYPE_FENCE_WAIT,
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BASE_KCPU_COMMAND_TYPE_CQS_WAIT,
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BASE_KCPU_COMMAND_TYPE_CQS_SET,
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BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION,
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BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION,
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BASE_KCPU_COMMAND_TYPE_MAP_IMPORT,
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BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT,
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BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE,
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BASE_KCPU_COMMAND_TYPE_JIT_ALLOC,
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BASE_KCPU_COMMAND_TYPE_JIT_FREE,
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BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND,
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BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER,
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BASE_KCPU_COMMAND_TYPE_SAMPLE_TIME,
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};
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#else
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/**
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* enum base_kcpu_command_type - Kernel CPU queue command type.
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* @BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL: fence_signal,
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* @BASE_KCPU_COMMAND_TYPE_FENCE_WAIT: fence_wait,
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* @BASE_KCPU_COMMAND_TYPE_CQS_WAIT: cqs_wait,
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* @BASE_KCPU_COMMAND_TYPE_CQS_SET: cqs_set,
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* @BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION: cqs_wait_operation,
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* @BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION: cqs_set_operation,
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* @BASE_KCPU_COMMAND_TYPE_MAP_IMPORT: map_import,
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* @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT: unmap_import,
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* @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE: unmap_import_force,
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* @BASE_KCPU_COMMAND_TYPE_JIT_ALLOC: jit_alloc,
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* @BASE_KCPU_COMMAND_TYPE_JIT_FREE: jit_free,
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* @BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND: group_suspend,
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* @BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER: error_barrier,
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*/
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enum base_kcpu_command_type {
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BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL,
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BASE_KCPU_COMMAND_TYPE_FENCE_WAIT,
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BASE_KCPU_COMMAND_TYPE_CQS_WAIT,
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BASE_KCPU_COMMAND_TYPE_CQS_SET,
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BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION,
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BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION,
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BASE_KCPU_COMMAND_TYPE_MAP_IMPORT,
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BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT,
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BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE,
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BASE_KCPU_COMMAND_TYPE_JIT_ALLOC,
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BASE_KCPU_COMMAND_TYPE_JIT_FREE,
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BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND,
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BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER,
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};
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#endif /* MALI_UNIT_TEST */
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/**
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* enum base_queue_group_priority - Priority of a GPU Command Queue Group.
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* @BASE_QUEUE_GROUP_PRIORITY_HIGH: GPU Command Queue Group is of high
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* priority.
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* @BASE_QUEUE_GROUP_PRIORITY_MEDIUM: GPU Command Queue Group is of medium
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* priority.
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* @BASE_QUEUE_GROUP_PRIORITY_LOW: GPU Command Queue Group is of low
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* priority.
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* @BASE_QUEUE_GROUP_PRIORITY_REALTIME: GPU Command Queue Group is of real-time
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* priority.
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* @BASE_QUEUE_GROUP_PRIORITY_COUNT: Number of GPU Command Queue Group
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* priority levels.
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*
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* Currently this is in order of highest to lowest, but if new levels are added
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* then those new levels may be out of order to preserve the ABI compatibility
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* with previous releases. At that point, ensure assignment to
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* the 'priority' member in &kbase_queue_group is updated to ensure it remains
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* a linear ordering.
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*
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* There should be no gaps in the enum, otherwise use of
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* BASE_QUEUE_GROUP_PRIORITY_COUNT in kbase must be updated.
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*/
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enum base_queue_group_priority {
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BASE_QUEUE_GROUP_PRIORITY_HIGH = 0,
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BASE_QUEUE_GROUP_PRIORITY_MEDIUM,
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BASE_QUEUE_GROUP_PRIORITY_LOW,
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BASE_QUEUE_GROUP_PRIORITY_REALTIME,
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BASE_QUEUE_GROUP_PRIORITY_COUNT
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};
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struct base_kcpu_command_fence_info {
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__u64 fence;
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};
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struct base_cqs_wait_info {
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__u64 addr;
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__u32 val;
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__u32 padding;
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};
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struct base_kcpu_command_cqs_wait_info {
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__u64 objs;
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__u32 nr_objs;
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__u32 inherit_err_flags;
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};
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struct base_cqs_set {
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__u64 addr;
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};
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struct base_kcpu_command_cqs_set_info {
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__u64 objs;
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__u32 nr_objs;
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__u32 padding;
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};
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/**
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* basep_cqs_data_type - Enumeration of CQS Data Types
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*
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* @BASEP_CQS_DATA_TYPE_U32: The Data Type of a CQS Object's value
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* is an unsigned 32-bit integer
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* @BASEP_CQS_DATA_TYPE_U64: The Data Type of a CQS Object's value
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* is an unsigned 64-bit integer
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*/
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typedef enum PACKED {
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BASEP_CQS_DATA_TYPE_U32 = 0,
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BASEP_CQS_DATA_TYPE_U64 = 1,
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} basep_cqs_data_type;
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/**
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* basep_cqs_wait_operation_op - Enumeration of CQS Object Wait
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* Operation conditions
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*
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* @BASEP_CQS_WAIT_OPERATION_LE: CQS Wait Operation indicating that a
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* wait will be satisfied when a CQS Object's
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* value is Less than or Equal to
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* the Wait Operation value
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* @BASEP_CQS_WAIT_OPERATION_GT: CQS Wait Operation indicating that a
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* wait will be satisfied when a CQS Object's
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* value is Greater than the Wait Operation value
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*/
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typedef enum {
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BASEP_CQS_WAIT_OPERATION_LE = 0,
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BASEP_CQS_WAIT_OPERATION_GT = 1,
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} basep_cqs_wait_operation_op;
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struct base_cqs_wait_operation_info {
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__u64 addr;
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__u64 val;
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__u8 operation;
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__u8 data_type;
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__u8 padding[6];
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};
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/**
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* struct base_kcpu_command_cqs_wait_operation_info - structure which contains information
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* about the Timeline CQS wait objects
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*
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* @objs: An array of Timeline CQS waits.
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* @nr_objs: Number of Timeline CQS waits in the array.
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* @inherit_err_flags: Bit-pattern for the CQSs in the array who's error field
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* to be served as the source for importing into the
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* queue's error-state.
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*/
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struct base_kcpu_command_cqs_wait_operation_info {
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__u64 objs;
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__u32 nr_objs;
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__u32 inherit_err_flags;
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};
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/**
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* basep_cqs_set_operation_op - Enumeration of CQS Set Operations
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*
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* @BASEP_CQS_SET_OPERATION_ADD: CQS Set operation for adding a value
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* to a synchronization object
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* @BASEP_CQS_SET_OPERATION_SET: CQS Set operation for setting the value
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* of a synchronization object
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*/
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typedef enum {
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BASEP_CQS_SET_OPERATION_ADD = 0,
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BASEP_CQS_SET_OPERATION_SET = 1,
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} basep_cqs_set_operation_op;
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struct base_cqs_set_operation_info {
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__u64 addr;
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__u64 val;
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__u8 operation;
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__u8 data_type;
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__u8 padding[6];
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};
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/**
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* struct base_kcpu_command_cqs_set_operation_info - structure which contains information
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* about the Timeline CQS set objects
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*
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* @objs: An array of Timeline CQS sets.
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* @nr_objs: Number of Timeline CQS sets in the array.
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* @padding: Structure padding, unused bytes.
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*/
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struct base_kcpu_command_cqs_set_operation_info {
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__u64 objs;
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__u32 nr_objs;
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__u32 padding;
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};
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/**
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* struct base_kcpu_command_import_info - structure which contains information
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* about the imported buffer.
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*
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* @handle: Address of imported user buffer.
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*/
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struct base_kcpu_command_import_info {
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__u64 handle;
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};
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/**
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* struct base_kcpu_command_jit_alloc_info - structure which contains
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* information about jit memory allocation.
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*
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* @info: An array of elements of the
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* struct base_jit_alloc_info type.
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* @count: The number of elements in the info array.
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* @padding: Padding to a multiple of 64 bits.
|
*/
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struct base_kcpu_command_jit_alloc_info {
|
__u64 info;
|
__u8 count;
|
__u8 padding[7];
|
};
|
|
/**
|
* struct base_kcpu_command_jit_free_info - structure which contains
|
* information about jit memory which is to be freed.
|
*
|
* @ids: An array containing the JIT IDs to free.
|
* @count: The number of elements in the ids array.
|
* @padding: Padding to a multiple of 64 bits.
|
*/
|
struct base_kcpu_command_jit_free_info {
|
__u64 ids;
|
__u8 count;
|
__u8 padding[7];
|
};
|
|
/**
|
* struct base_kcpu_command_group_suspend_info - structure which contains
|
* suspend buffer data captured for a suspended queue group.
|
*
|
* @buffer: Pointer to an array of elements of the type char.
|
* @size: Number of elements in the @buffer array.
|
* @group_handle: Handle to the mapping of CSG.
|
* @padding: padding to a multiple of 64 bits.
|
*/
|
struct base_kcpu_command_group_suspend_info {
|
__u64 buffer;
|
__u32 size;
|
__u8 group_handle;
|
__u8 padding[3];
|
};
|
|
#if MALI_UNIT_TEST
|
struct base_kcpu_command_sample_time_info {
|
__u64 time;
|
};
|
#endif /* MALI_UNIT_TEST */
|
|
/**
|
* struct base_kcpu_command - kcpu command.
|
* @type: type of the kcpu command, one enum base_kcpu_command_type
|
* @padding: padding to a multiple of 64 bits
|
* @info: structure which contains information about the kcpu command;
|
* actual type is determined by @p type
|
* @info.fence: Fence
|
* @info.cqs_wait: CQS wait
|
* @info.cqs_set: CQS set
|
* @info.import: import
|
* @info.jit_alloc: jit allocation
|
* @info.jit_free: jit deallocation
|
* @info.suspend_buf_copy: suspend buffer copy
|
* @info.sample_time: sample time
|
* @info.padding: padding
|
*/
|
struct base_kcpu_command {
|
__u8 type;
|
__u8 padding[sizeof(__u64) - sizeof(__u8)];
|
union {
|
struct base_kcpu_command_fence_info fence;
|
struct base_kcpu_command_cqs_wait_info cqs_wait;
|
struct base_kcpu_command_cqs_set_info cqs_set;
|
struct base_kcpu_command_cqs_wait_operation_info cqs_wait_operation;
|
struct base_kcpu_command_cqs_set_operation_info cqs_set_operation;
|
struct base_kcpu_command_import_info import;
|
struct base_kcpu_command_jit_alloc_info jit_alloc;
|
struct base_kcpu_command_jit_free_info jit_free;
|
struct base_kcpu_command_group_suspend_info suspend_buf_copy;
|
#if MALI_UNIT_TEST
|
struct base_kcpu_command_sample_time_info sample_time;
|
#endif /* MALI_UNIT_TEST */
|
__u64 padding[2]; /* No sub-struct should be larger */
|
} info;
|
};
|
|
/**
|
* struct basep_cs_stream_control - CSI capabilities.
|
*
|
* @features: Features of this stream
|
* @padding: Padding to a multiple of 64 bits.
|
*/
|
struct basep_cs_stream_control {
|
__u32 features;
|
__u32 padding;
|
};
|
|
/**
|
* struct basep_cs_group_control - CSG interface capabilities.
|
*
|
* @features: Features of this group
|
* @stream_num: Number of streams in this group
|
* @suspend_size: Size in bytes of the suspend buffer for this group
|
* @padding: Padding to a multiple of 64 bits.
|
*/
|
struct basep_cs_group_control {
|
__u32 features;
|
__u32 stream_num;
|
__u32 suspend_size;
|
__u32 padding;
|
};
|
|
/**
|
* struct base_gpu_queue_group_error_fatal_payload - Unrecoverable fault
|
* error information associated with GPU command queue group.
|
*
|
* @sideband: Additional information of the unrecoverable fault.
|
* @status: Unrecoverable fault information.
|
* This consists of exception type (least significant byte) and
|
* data (remaining bytes). One example of exception type is
|
* CS_INVALID_INSTRUCTION (0x49).
|
* @padding: Padding to make multiple of 64bits
|
*/
|
struct base_gpu_queue_group_error_fatal_payload {
|
__u64 sideband;
|
__u32 status;
|
__u32 padding;
|
};
|
|
/**
|
* struct base_gpu_queue_error_fatal_payload - Unrecoverable fault
|
* error information related to GPU command queue.
|
*
|
* @sideband: Additional information about this unrecoverable fault.
|
* @status: Unrecoverable fault information.
|
* This consists of exception type (least significant byte) and
|
* data (remaining bytes). One example of exception type is
|
* CS_INVALID_INSTRUCTION (0x49).
|
* @csi_index: Index of the CSF interface the queue is bound to.
|
* @padding: Padding to make multiple of 64bits
|
*/
|
struct base_gpu_queue_error_fatal_payload {
|
__u64 sideband;
|
__u32 status;
|
__u8 csi_index;
|
__u8 padding[3];
|
};
|
|
/**
|
* enum base_gpu_queue_group_error_type - GPU Fatal error type.
|
*
|
* @BASE_GPU_QUEUE_GROUP_ERROR_FATAL: Fatal error associated with GPU
|
* command queue group.
|
* @BASE_GPU_QUEUE_GROUP_QUEUE_ERROR_FATAL: Fatal error associated with GPU
|
* command queue.
|
* @BASE_GPU_QUEUE_GROUP_ERROR_TIMEOUT: Fatal error associated with
|
* progress timeout.
|
* @BASE_GPU_QUEUE_GROUP_ERROR_TILER_HEAP_OOM: Fatal error due to running out
|
* of tiler heap memory.
|
* @BASE_GPU_QUEUE_GROUP_ERROR_FATAL_COUNT: The number of fatal error types
|
*
|
* This type is used for &struct_base_gpu_queue_group_error.error_type.
|
*/
|
enum base_gpu_queue_group_error_type {
|
BASE_GPU_QUEUE_GROUP_ERROR_FATAL = 0,
|
BASE_GPU_QUEUE_GROUP_QUEUE_ERROR_FATAL,
|
BASE_GPU_QUEUE_GROUP_ERROR_TIMEOUT,
|
BASE_GPU_QUEUE_GROUP_ERROR_TILER_HEAP_OOM,
|
BASE_GPU_QUEUE_GROUP_ERROR_FATAL_COUNT
|
};
|
|
/**
|
* struct base_gpu_queue_group_error - Unrecoverable fault information
|
* @error_type: Error type of @base_gpu_queue_group_error_type
|
* indicating which field in union payload is filled
|
* @padding: Unused bytes for 64bit boundary
|
* @payload: Input Payload
|
* @payload.fatal_group: Unrecoverable fault error associated with
|
* GPU command queue group
|
* @payload.fatal_queue: Unrecoverable fault error associated with command queue
|
*/
|
struct base_gpu_queue_group_error {
|
__u8 error_type;
|
__u8 padding[7];
|
union {
|
struct base_gpu_queue_group_error_fatal_payload fatal_group;
|
struct base_gpu_queue_error_fatal_payload fatal_queue;
|
} payload;
|
};
|
|
/**
|
* enum base_csf_notification_type - Notification type
|
*
|
* @BASE_CSF_NOTIFICATION_EVENT: Notification with kernel event
|
* @BASE_CSF_NOTIFICATION_GPU_QUEUE_GROUP_ERROR: Notification with GPU fatal
|
* error
|
* @BASE_CSF_NOTIFICATION_CPU_QUEUE_DUMP: Notification with dumping cpu
|
* queue
|
* @BASE_CSF_NOTIFICATION_COUNT: The number of notification type
|
*
|
* This type is used for &struct_base_csf_notification.type.
|
*/
|
enum base_csf_notification_type {
|
BASE_CSF_NOTIFICATION_EVENT = 0,
|
BASE_CSF_NOTIFICATION_GPU_QUEUE_GROUP_ERROR,
|
BASE_CSF_NOTIFICATION_CPU_QUEUE_DUMP,
|
BASE_CSF_NOTIFICATION_COUNT
|
};
|
|
/**
|
* struct base_csf_notification - Event or error notification
|
*
|
* @type: Notification type of @base_csf_notification_type
|
* @padding: Padding for 64bit boundary
|
* @payload: Input Payload
|
* @payload.align: To fit the struct into a 64-byte cache line
|
* @payload.csg_error: CSG error
|
* @payload.csg_error.handle: Handle of GPU command queue group associated with
|
* fatal error
|
* @payload.csg_error.padding: Padding
|
* @payload.csg_error.error: Unrecoverable fault error
|
*
|
*/
|
struct base_csf_notification {
|
__u8 type;
|
__u8 padding[7];
|
union {
|
struct {
|
__u8 handle;
|
__u8 padding[7];
|
struct base_gpu_queue_group_error error;
|
} csg_error;
|
|
__u8 align[56];
|
} payload;
|
};
|
|
#endif /* _UAPI_BASE_CSF_KERNEL_H_ */
|
