/*
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* Copyright (c) 2016 Google, Inc
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*
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* From coreboot broadwell support
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <dm.h>
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#include <pch.h>
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#include <asm/intel_regs.h>
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#include <asm/io.h>
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#include <asm/lpc_common.h>
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#include <asm/arch/pch.h>
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#include <asm/arch/spi.h>
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static void set_spi_speed(void)
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{
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u32 fdod;
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u8 ssfc;
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/* Observe SPI Descriptor Component Section 0 */
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writel(0x1000, SPI_REG(SPIBAR_FDOC));
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/* Extract the Write/Erase SPI Frequency from descriptor */
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fdod = readl(SPI_REG(SPIBAR_FDOD));
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fdod >>= 24;
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fdod &= 7;
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/* Set Software Sequence frequency to match */
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ssfc = readb(SPI_REG(SPIBAR_SSFC + 2));
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ssfc &= ~7;
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ssfc |= fdod;
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writeb(ssfc, SPI_REG(SPIBAR_SSFC + 2));
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}
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static int broadwell_lpc_early_init(struct udevice *dev)
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{
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set_spi_speed();
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return 0;
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}
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static int lpc_init_extra(struct udevice *dev)
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{
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return 0;
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}
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static int broadwell_lpc_probe(struct udevice *dev)
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{
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int ret;
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if (!(gd->flags & GD_FLG_RELOC)) {
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ret = lpc_common_early_init(dev);
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if (ret) {
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debug("%s: lpc_early_init() failed\n", __func__);
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return ret;
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}
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return broadwell_lpc_early_init(dev);
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}
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return lpc_init_extra(dev);
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}
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static const struct udevice_id broadwell_lpc_ids[] = {
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{ .compatible = "intel,broadwell-lpc" },
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{ }
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};
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U_BOOT_DRIVER(broadwell_lpc_drv) = {
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.name = "lpc",
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.id = UCLASS_LPC,
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.of_match = broadwell_lpc_ids,
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.probe = broadwell_lpc_probe,
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};
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