/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Nobuhiro Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __AG101_H
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#define __AG101_H
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/* Hardware register bases */
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/* AHB Controller */
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#define CONFIG_FTAHBC020S_BASE 0x90100000
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/* Static Memory Controller (SRAM) */
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#define CONFIG_FTSMC020_BASE 0x90200000
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/* FTSDMC021 SDRAM Controller */
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#define CONFIG_FTSDMC021_BASE 0x90300000
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/* DMA Controller */
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#define CONFIG_FTDMAC020_BASE 0x90400000
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/* AHB-to-APB Bridge */
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#define CONFIG_FTAPBBRG020S_01_BASE 0x90500000
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/* LCD Controller */
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#define CONFIG_FTLCDC100_BASE 0x90600000
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/* Reserved */
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#define CONFIG_RESERVED_01_BASE 0x90700000
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/* Reserved */
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#define CONFIG_RESERVED_02_BASE 0x90800000
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/* Ethernet */
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#define CONFIG_FTMAC100_BASE 0x90900000
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/* External USB host */
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#define CONFIG_EXT_USB_HOST_BASE 0x90A00000
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/* USB Device */
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#define CONFIG_USB_DEV_BASE 0x90B00000
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/* External AHB-to-PCI Bridge (FTPCI100 not exist in ag101) */
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#define CONFIG_EXT_AHBPCIBRG_BASE 0x90C00000
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/* Reserved */
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#define CONFIG_RESERVED_03_BASE 0x90D00000
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/* External AHB-to-APB Bridger (FTAPBBRG020S_02) */
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#define CONFIG_EXT_AHBAPBBRG_BASE 0x90E00000
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/* External AHB slave1 (LCD) */
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#define CONFIG_EXT_AHBSLAVE01_BASE 0x90F00000
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/* External AHB slave2 (FUSBH200) */
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#define CONFIG_EXT_AHBSLAVE02_BASE 0x92000000
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/* DEBUG LED */
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#define CONFIG_DEBUG_LED 0x902FFFFC
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/* APB Device definitions */
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/* Power Management Unit */
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#define CONFIG_FTPMU010_BASE 0x98100000
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/* BT UART 2/IrDA (UART 01 in Linux) */
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#define CONFIG_FTUART010_01_BASE 0x98300000
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/* Counter/Timers */
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#define CONFIG_FTTMR010_BASE 0x98400000
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/* Watchdog Timer */
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#define CONFIG_FTWDT010_BASE 0x98500000
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/* Real Time Clock */
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#define CONFIG_FTRTC010_BASE 0x98600000
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/* GPIO */
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#define CONFIG_FTGPIO010_BASE 0x98700000
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/* Interrupt Controller */
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#define CONFIG_FTINTC010_BASE 0x98800000
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/* I2C */
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#define CONFIG_FTIIC010_BASE 0x98A00000
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/* Reserved */
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#define CONFIG_RESERVED_04_BASE 0x98C00000
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/* Compat Flash Controller */
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#define CONFIG_FTCFC010_BASE 0x98D00000
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/* SD Controller */
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#define CONFIG_FTSDC010_BASE 0x98E00000
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/* Synchronous Serial Port Controller (SSP) I2S/AC97 */
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#define CONFIG_FTSSP010_02_BASE 0x99400000
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/* ST UART ? SSP 02 (UART 02 in Linux) */
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#define CONFIG_FTUART010_02_BASE 0x99600000
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/* The following address was not defined in Linux */
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/* FF UART 3 */
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#define CONFIG_FTUART010_03_BASE 0x98200000
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/* Synchronous Serial Port Controller (SSP) 01 */
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#define CONFIG_FTSSP010_01_BASE 0x98B00000
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/* IrDA */
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#define CONFIG_IRDA_BASE 0x98900000
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/* PWM - Pulse Width Modulator Controller */
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#define CONFIG_PMW_BASE 0x99100000
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#endif /* __AG101_H */
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