/*
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* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CLOCK_MANAGER_H_
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#define _CLOCK_MANAGER_H_
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#ifndef __ASSEMBLER__
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void cm_wait_for_lock(u32 mask);
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int cm_wait_for_fsm(void);
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void cm_print_clock_quick_summary(void);
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#endif
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#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
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#include <asm/arch/clock_manager_gen5.h>
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#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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#include <asm/arch/clock_manager_arria10.h>
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#endif
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#endif /* _CLOCK_MANAGER_H_ */
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