1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
| /*
| * Copyright (C) 2015 Linaro
| * Peter Griffin <peter.griffin@linaro.org>
| *
| * SPDX-License-Identifier: GPL-2.0+
| */
|
| #ifndef __ASM_ARM_ARCH_PERIPH_H
| #define __ASM_ARM_ARCH_PERIPH_H
|
| /*
| * Peripherals required for pinmux configuration. List will
| * grow with support for more devices getting added.
| * Numbering based on interrupt table.
| *
| */
| enum periph_id {
| PERIPH_ID_UART0 = 36,
| PERIPH_ID_UART1,
| PERIPH_ID_UART2,
| PERIPH_ID_UART3,
| PERIPH_ID_UART4,
| PERIPH_ID_UART5,
| PERIPH_ID_SDMMC0 = 72,
| PERIPH_ID_SDMMC1,
|
| PERIPH_ID_NONE = -1,
| };
|
| #endif /* __ASM_ARM_ARCH_PERIPH_H */
|
|
