/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2005 Openedhand Ltd.
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*
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* Author: Richard Purdie <richard@openedhand.com>
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*/
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#ifndef _ES8323_H
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#define _ES8323_H
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#define CONFIG_HHTECH_MINIPMP 1
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/* ES8323 register space */
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#define ES8323_CONTROL1 0x00
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#define ES8323_CONTROL2 0x01
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#define ES8323_CHIPPOWER 0x02
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#define ES8323_ADCPOWER 0x03
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#define ES8323_DACPOWER 0x04
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#define ES8323_CHIPLOPOW1 0x05
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#define ES8323_CHIPLOPOW2 0x06
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#define ES8323_ANAVOLMANAG 0x07
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#define ES8323_MASTERMODE 0x08
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#define ES8323_ADCCONTROL1 0x09
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#define ES8323_ADCCONTROL2 0x0a
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#define ES8323_ADCCONTROL3 0x0b
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#define ES8323_ADCCONTROL4 0x0c
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#define ES8323_ADCCONTROL5 0x0d
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#define ES8323_ADCCONTROL6 0x0e
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#define ES8323_ADCCONTROL7 0x0f
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#define ES8323_ADCCONTROL8 0x10
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#define ES8323_ADCCONTROL9 0x11
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#define ES8323_ADCCONTROL10 0x12
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#define ES8323_ADCCONTROL11 0x13
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#define ES8323_ADCCONTROL12 0x14
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#define ES8323_ADCCONTROL13 0x15
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#define ES8323_ADCCONTROL14 0x16
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#define ES8323_DACCONTROL1 0x17
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#define ES8323_DACCONTROL2 0x18
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#define ES8323_DACCONTROL3 0x19
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#define ES8323_DACCONTROL4 0x1a
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#define ES8323_DACCONTROL5 0x1b
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#define ES8323_DACCONTROL6 0x1c
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#define ES8323_DACCONTROL7 0x1d
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#define ES8323_DACCONTROL8 0x1e
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#define ES8323_DACCONTROL9 0x1f
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#define ES8323_DACCONTROL10 0x20
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#define ES8323_DACCONTROL11 0x21
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#define ES8323_DACCONTROL12 0x22
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#define ES8323_DACCONTROL13 0x23
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#define ES8323_DACCONTROL14 0x24
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#define ES8323_DACCONTROL15 0x25
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#define ES8323_DACCONTROL16 0x26
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#define ES8323_DACCONTROL17 0x27
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#define ES8323_DACCONTROL18 0x28
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#define ES8323_DACCONTROL19 0x29
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#define ES8323_DACCONTROL20 0x2a
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#define ES8323_DACCONTROL21 0x2b
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#define ES8323_DACCONTROL22 0x2c
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#define ES8323_DACCONTROL23 0x2d
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#define ES8323_DACCONTROL24 0x2e
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#define ES8323_DACCONTROL25 0x2f
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#define ES8323_DACCONTROL26 0x30
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#define ES8323_DACCONTROL27 0x31
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#define ES8323_DACCONTROL28 0x32
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#define ES8323_DACCONTROL29 0x33
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#define ES8323_DACCONTROL30 0x34
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#define ES8323_LADC_VOL ES8323_ADCCONTROL8
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#define ES8323_RADC_VOL ES8323_ADCCONTROL9
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#define ES8323_LDAC_VOL ES8323_DACCONTROL4
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#define ES8323_RDAC_VOL ES8323_DACCONTROL5
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#define ES8323_LOUT1_VOL ES8323_DACCONTROL24
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#define ES8323_ROUT1_VOL ES8323_DACCONTROL25
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#define ES8323_LOUT2_VOL ES8323_DACCONTROL26
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#define ES8323_ROUT2_VOL ES8323_DACCONTROL27
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#define ES8323_ADC_MUTE ES8323_ADCCONTROL7
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#define ES8323_DAC_MUTE ES8323_DACCONTROL3
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#define ES8323_IFACE ES8323_MASTERMODE
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#define ES8323_ADC_IFACE ES8323_ADCCONTROL4
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#define ES8323_ADC_SRATE ES8323_ADCCONTROL5
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#define ES8323_DAC_IFACE ES8323_DACCONTROL1
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#define ES8323_DAC_SRATE ES8323_DACCONTROL2
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#define ES8323_CACHEREGNUM 53
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#define ES8323_SYSCLK 0
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struct es8323_setup_data {
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int i2c_bus;
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unsigned short i2c_address;
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};
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#if 1 //lzcx
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#define ES8323_PLL1 0
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#define ES8323_PLL2 1
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/* clock inputs */
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#define ES8323_MCLK 0
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#define ES8323_PCMCLK 1
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/* clock divider id's */
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#define ES8323_PCMDIV 0
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#define ES8323_BCLKDIV 1
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#define ES8323_VXCLKDIV 2
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/* PCM clock dividers */
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#define ES8323_PCM_DIV_1 (0 << 6)
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#define ES8323_PCM_DIV_3 (2 << 6)
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#define ES8323_PCM_DIV_5_5 (3 << 6)
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#define ES8323_PCM_DIV_2 (4 << 6)
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#define ES8323_PCM_DIV_4 (5 << 6)
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#define ES8323_PCM_DIV_6 (6 << 6)
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#define ES8323_PCM_DIV_8 (7 << 6)
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/* BCLK clock dividers */
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#define ES8323_BCLK_DIV_1 (0 << 7)
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#define ES8323_BCLK_DIV_2 (1 << 7)
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#define ES8323_BCLK_DIV_4 (2 << 7)
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#define ES8323_BCLK_DIV_8 (3 << 7)
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/* VXCLK clock dividers */
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#define ES8323_VXCLK_DIV_1 (0 << 6)
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#define ES8323_VXCLK_DIV_2 (1 << 6)
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#define ES8323_VXCLK_DIV_4 (2 << 6)
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#define ES8323_VXCLK_DIV_8 (3 << 6)
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#define ES8323_VXCLK_DIV_16 (4 << 6)
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#define ES8323_DAI_HIFI 0
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#define ES8323_DAI_VOICE 1
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#define ES8323_1536FS 1536
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#define ES8323_1024FS 1024
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#define ES8323_768FS 768
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#define ES8323_512FS 512
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#define ES8323_384FS 384
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#define ES8323_256FS 256
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#define ES8323_128FS 128
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#endif
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#endif
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