/*
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* ov2685 driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* V0.0X01.0X01 add enum_frame_interval function.
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* V0.0X01.0X02 add quick stream on/off
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* V0.0X01.0X03 add function g_mbus_config
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x3)
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#define CHIP_ID 0x2685
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#define OV2685_REG_CHIP_ID 0x300a
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#define REG_SC_CTRL_MODE 0x0100
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#define SC_CTRL_MODE_STANDBY 0x0
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#define SC_CTRL_MODE_STREAMING BIT(0)
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#define OV2685_REG_EXPOSURE 0x3500
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#define OV2685_EXPOSURE_MIN 4
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#define OV2685_EXPOSURE_STEP 1
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#define OV2685_REG_VTS 0x380e
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#define OV2685_VTS_MAX 0x7fff
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#define OV2685_REG_GAIN 0x350a
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#define OV2685_GAIN_MIN 0
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#define OV2685_GAIN_MAX 0x07ff
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#define OV2685_GAIN_STEP 0x1
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#define OV2685_GAIN_DEFAULT 0x0036
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#define OV2685_REG_TEST_PATTERN 0x5080
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#define OV2685_TEST_PATTERN_DISABLED 0x00
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#define OV2685_TEST_PATTERN_COLOR_BAR 0x80
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#define OV2685_TEST_PATTERN_RND 0x81
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#define OV2685_TEST_PATTERN_COLOR_BAR_FADE 0x88
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#define OV2685_TEST_PATTERN_BW_SQUARE 0x92
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#define OV2685_TEST_PATTERN_COLOR_SQUARE 0x82
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#define REG_NULL 0xFFFF
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#define OV2685_REG_VALUE_08BIT 1
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#define OV2685_REG_VALUE_16BIT 2
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#define OV2685_REG_VALUE_24BIT 3
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#define OV2685_LANES 1
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#define OV2685_BITS_PER_SAMPLE 10
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#define OV2685_NAME "ov2685"
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struct regval {
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u16 addr;
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u8 val;
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};
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struct ov2685_mode {
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u32 width;
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u32 height;
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u32 exp_def;
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u32 hts_def;
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u32 vts_def;
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struct v4l2_fract max_fps;
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const struct regval *reg_list;
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};
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struct ov2685 {
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struct i2c_client *client;
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struct clk *xvclk;
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struct regulator *avdd_regulator; /* Analog power */
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struct regulator *dovdd_regulator; /* Digital I/O power */
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/* use internal DVDD power */
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struct gpio_desc *reset_gpio;
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bool streaming;
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struct mutex mutex;
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_ctrl *anal_gain;
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struct v4l2_ctrl *exposure;
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struct v4l2_ctrl *hblank;
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struct v4l2_ctrl *vblank;
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struct v4l2_ctrl *test_pattern;
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struct v4l2_ctrl_handler ctrl_handler;
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const struct ov2685_mode *cur_mode;
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u32 module_index;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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};
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#define to_ov2685(sd) container_of(sd, struct ov2685, subdev)
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/* PLL settings bases on 24M xvclk */
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static struct regval ov2685_1600x1200_regs[] = {
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{0x0103, 0x01},
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{0x0100, 0x00},
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{0x3002, 0x00},
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{0x3016, 0x1c},
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{0x3018, 0x44},
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{0x301d, 0xf0},
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{0x3020, 0x00},
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{0x3082, 0x37},
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{0x3083, 0x03},
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{0x3084, 0x09},
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{0x3085, 0x04},
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{0x3086, 0x00},
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{0x3087, 0x00},
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{0x3501, 0x4e},
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{0x3502, 0xe0},
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{0x3503, 0x07},
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{0x350b, 0x36},
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{0x3600, 0xb4},
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{0x3603, 0x35},
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{0x3604, 0x24},
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{0x3605, 0x00},
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{0x3620, 0x24},
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{0x3621, 0x34},
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{0x3622, 0x03},
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{0x3628, 0x10},
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{0x3705, 0x3c},
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{0x370a, 0x21},
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{0x370c, 0x50},
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{0x370d, 0xc0},
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{0x3717, 0x58},
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{0x3718, 0x80},
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{0x3720, 0x00},
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{0x3721, 0x09},
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{0x3722, 0x06},
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{0x3723, 0x59},
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{0x3738, 0x99},
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{0x3781, 0x80},
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{0x3784, 0x0c},
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{0x3789, 0x60},
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{0x3800, 0x00},
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{0x3801, 0x00},
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{0x3802, 0x00},
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{0x3803, 0x00},
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{0x3804, 0x06},
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{0x3805, 0x4f},
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{0x3806, 0x04},
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{0x3807, 0xbf},
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{0x3808, 0x06},
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{0x3809, 0x40},
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{0x380a, 0x04},
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{0x380b, 0xb0},
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{0x380c, 0x06},
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{0x380d, 0xa4},
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{0x380e, 0x05},
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{0x380f, 0x0e},
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{0x3810, 0x00},
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{0x3811, 0x08},
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{0x3812, 0x00},
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{0x3813, 0x08},
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{0x3814, 0x11},
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{0x3815, 0x11},
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{0x3819, 0x04},
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{0x3820, 0xc0},
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{0x3821, 0x00},
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{0x3a06, 0x01},
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{0x3a07, 0x84},
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{0x3a08, 0x01},
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{0x3a09, 0x43},
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{0x3a0a, 0x24},
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{0x3a0b, 0x60},
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{0x3a0c, 0x28},
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{0x3a0d, 0x60},
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{0x3a0e, 0x04},
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{0x3a0f, 0x8c},
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{0x3a10, 0x05},
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{0x3a11, 0x0c},
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{0x4000, 0x81},
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{0x4001, 0x40},
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{0x4008, 0x02},
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{0x4009, 0x09},
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{0x4300, 0x00},
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{0x430e, 0x00},
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{0x4602, 0x02},
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{0x481b, 0x40},
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{0x481f, 0x40},
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{0x4837, 0x18},
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{0x5000, 0x1f},
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{0x5001, 0x05},
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{0x5002, 0x30},
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{0x5003, 0x04},
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{0x5004, 0x00},
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{0x5005, 0x0c},
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{0x5280, 0x15},
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{0x5281, 0x06},
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{0x5282, 0x06},
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{0x5283, 0x08},
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{0x5284, 0x1c},
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{0x5285, 0x1c},
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{0x5286, 0x20},
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{0x5287, 0x10},
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{REG_NULL, 0x00}
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};
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#define OV2685_LINK_FREQ_330MHZ 330000000
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static const s64 link_freq_menu_items[] = {
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OV2685_LINK_FREQ_330MHZ
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};
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static const char * const ov2685_test_pattern_menu[] = {
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"Disabled",
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"Color Bar",
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"RND PATTERN",
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"Color Bar FADE",
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"BW SQUARE",
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"COLOR SQUARE"
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};
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static const int ov2685_test_pattern_val[] = {
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OV2685_TEST_PATTERN_DISABLED,
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OV2685_TEST_PATTERN_COLOR_BAR,
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OV2685_TEST_PATTERN_RND,
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OV2685_TEST_PATTERN_COLOR_BAR_FADE,
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OV2685_TEST_PATTERN_BW_SQUARE,
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OV2685_TEST_PATTERN_COLOR_SQUARE,
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};
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static const struct ov2685_mode supported_modes[] = {
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{
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.width = 1600,
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.height = 1200,
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.exp_def = 0x04ee,
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.hts_def = 0x06a4,
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.vts_def = 0x050e,
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.max_fps = {
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.numerator = 10000,
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.denominator = 300000,
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},
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.reg_list = ov2685_1600x1200_regs,
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},
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};
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/* Write registers up to 4 at a time */
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static int ov2685_write_reg(struct i2c_client *client, u16 reg,
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unsigned int len, u32 val)
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{
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int buf_i;
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int val_i;
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u8 buf[6];
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u8 *val_p;
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__be32 val_be;
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if (len > 4)
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return -EINVAL;
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buf[0] = reg >> 8;
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buf[1] = reg & 0xff;
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val_be = cpu_to_be32(val);
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val_p = (u8 *)&val_be;
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buf_i = 2;
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val_i = 4 - len;
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while (val_i < 4)
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buf[buf_i++] = val_p[val_i++];
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if (i2c_master_send(client, buf, len + 2) != len + 2)
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return -EIO;
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return 0;
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}
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static int ov2685_write_array(struct i2c_client *client,
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const struct regval *regs)
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{
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int i, ret = 0;
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for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
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ret = ov2685_write_reg(client, regs[i].addr,
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OV2685_REG_VALUE_08BIT, regs[i].val);
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return ret;
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}
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/* Read registers up to 4 at a time */
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static int ov2685_read_reg(struct i2c_client *client, u16 reg,
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unsigned int len, u32 *val)
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{
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struct i2c_msg msgs[2];
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u8 *data_be_p;
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__be32 data_be = 0;
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__be16 reg_addr_be = cpu_to_be16(reg);
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int ret;
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if (len > 4)
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return -EINVAL;
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data_be_p = (u8 *)&data_be;
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/* Write register address */
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msgs[0].addr = client->addr;
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msgs[0].flags = 0;
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msgs[0].len = 2;
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msgs[0].buf = (u8 *)®_addr_be;
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/* Read data from register */
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msgs[1].addr = client->addr;
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msgs[1].flags = I2C_M_RD;
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msgs[1].len = len;
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msgs[1].buf = &data_be_p[4 - len];
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs))
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return -EIO;
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*val = be32_to_cpu(data_be);
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return 0;
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}
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static void ov2685_fill_fmt(struct ov2685 *ov2685,
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struct v4l2_mbus_framefmt *fmt)
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{
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fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
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fmt->width = ov2685->cur_mode->width;
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fmt->height = ov2685->cur_mode->height;
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fmt->field = V4L2_FIELD_NONE;
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}
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static int ov2685_set_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_format *fmt)
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{
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struct ov2685 *ov2685 = to_ov2685(sd);
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struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
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ov2685_fill_fmt(ov2685, mbus_fmt);
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return 0;
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}
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static int ov2685_get_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_format *fmt)
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{
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struct ov2685 *ov2685 = to_ov2685(sd);
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struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
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ov2685_fill_fmt(ov2685, mbus_fmt);
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return 0;
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}
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static int ov2685_enum_mbus_code(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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if (code->index >= ARRAY_SIZE(supported_modes))
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return -EINVAL;
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code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
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return 0;
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}
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static int ov2685_enum_frame_sizes(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_frame_size_enum *fse)
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{
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int index = fse->index;
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if (index >= ARRAY_SIZE(supported_modes))
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return -EINVAL;
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fse->code = MEDIA_BUS_FMT_SBGGR10_1X10;
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fse->min_width = supported_modes[index].width;
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fse->max_width = supported_modes[index].width;
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fse->max_height = supported_modes[index].height;
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fse->min_height = supported_modes[index].height;
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return 0;
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}
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static inline void ov2685_set_exposure(struct ov2685 *ov2685, s32 val)
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{
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ov2685_write_reg(ov2685->client, OV2685_REG_EXPOSURE,
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OV2685_REG_VALUE_24BIT, val << 4);
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}
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static inline void ov2685_set_gain(struct ov2685 *ov2685, s32 val)
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{
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ov2685_write_reg(ov2685->client, OV2685_REG_GAIN,
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OV2685_REG_VALUE_16BIT, val & OV2685_GAIN_MAX);
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}
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static inline void ov2685_set_vts(struct ov2685 *ov2685, s32 val)
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{
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val += ov2685->cur_mode->height;
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ov2685_write_reg(ov2685->client, OV2685_REG_VTS,
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OV2685_REG_VALUE_16BIT, val);
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}
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static inline void ov2685_enable_test_pattern(struct ov2685 *ov2685, u32 pat)
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{
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ov2685_write_reg(ov2685->client, OV2685_REG_TEST_PATTERN,
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OV2685_REG_VALUE_08BIT, ov2685_test_pattern_val[pat]);
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}
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static int __ov2685_power_on(struct ov2685 *ov2685)
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{
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int ret;
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struct device *dev = &ov2685->client->dev;
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ret = clk_prepare_enable(ov2685->xvclk);
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if (ret < 0) {
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dev_err(dev, "Failed to enable xvclk\n");
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return ret;
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}
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clk_set_rate(ov2685->xvclk, 24000000);
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gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
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/* AVDD and DOVDD may rise in any order */
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ret = regulator_enable(ov2685->avdd_regulator);
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if (ret < 0) {
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dev_err(dev, "Failed to enable AVDD regulator\n");
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goto disable_xvclk;
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}
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ret = regulator_enable(ov2685->dovdd_regulator);
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if (ret < 0) {
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dev_err(dev, "Failed to enable DOVDD regulator\n");
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goto disable_avdd;
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}
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/* The minimum delay between AVDD and reset rising can be 0 */
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gpiod_set_value_cansleep(ov2685->reset_gpio, 0);
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/* 8192 xvclk cycles prior to the first SCCB transaction.
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* NOTE: An additional 1ms must be added to wait for
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* SCCB to become stable when using internal DVDD.
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*/
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usleep_range(1350, 1500);
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/* HACK: ov2685 would output messy data after reset(R0103),
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* writing register before .s_stream() as a workaround
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*/
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ret = ov2685_write_array(ov2685->client, ov2685->cur_mode->reg_list);
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return ret;
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disable_avdd:
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regulator_disable(ov2685->avdd_regulator);
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disable_xvclk:
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clk_disable_unprepare(ov2685->xvclk);
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return ret;
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}
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static void __ov2685_power_off(struct ov2685 *ov2685)
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{
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/* 512 xvclk cycles after the last SCCB transaction or MIPI frame end */
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usleep_range(30, 50);
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clk_disable_unprepare(ov2685->xvclk);
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gpiod_set_value_cansleep(ov2685->reset_gpio, 1);
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regulator_disable(ov2685->dovdd_regulator);
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regulator_disable(ov2685->avdd_regulator);
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}
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static int ov2685_s_power(struct v4l2_subdev *sd, int on)
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{
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struct ov2685 *ov2685 = to_ov2685(sd);
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int ret = 0;
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mutex_lock(&ov2685->mutex);
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if (on)
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ret = pm_runtime_get_sync(&ov2685->client->dev);
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else
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ret = pm_runtime_put(&ov2685->client->dev);
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mutex_unlock(&ov2685->mutex);
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return ret;
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}
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static void ov2685_get_module_inf(struct ov2685 *ov2685,
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struct rkmodule_inf *inf)
|
{
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memset(inf, 0, sizeof(*inf));
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strlcpy(inf->base.sensor, OV2685_NAME, sizeof(inf->base.sensor));
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strlcpy(inf->base.module, ov2685->module_name,
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sizeof(inf->base.module));
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strlcpy(inf->base.lens, ov2685->len_name, sizeof(inf->base.lens));
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}
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static long ov2685_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
|
{
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struct ov2685 *ov2685 = to_ov2685(sd);
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long ret = 0;
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u32 stream = 0;
|
|
switch (cmd) {
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case RKMODULE_GET_MODULE_INFO:
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ov2685_get_module_inf(ov2685, (struct rkmodule_inf *)arg);
|
break;
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case RKMODULE_SET_QUICK_STREAM:
|
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stream = *((u32 *)arg);
|
|
if (stream)
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ret = ov2685_write_reg(ov2685->client, REG_SC_CTRL_MODE,
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OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STREAMING);
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else
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ret = ov2685_write_reg(ov2685->client, REG_SC_CTRL_MODE,
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OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STANDBY);
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break;
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default:
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ret = -ENOIOCTLCMD;
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break;
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}
|
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return ret;
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}
|
|
#ifdef CONFIG_COMPAT
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static long ov2685_compat_ioctl32(struct v4l2_subdev *sd,
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unsigned int cmd, unsigned long arg)
|
{
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void __user *up = compat_ptr(arg);
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struct rkmodule_inf *inf;
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struct rkmodule_awb_cfg *cfg;
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long ret;
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u32 stream = 0;
|
|
switch (cmd) {
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case RKMODULE_GET_MODULE_INFO:
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inf = kzalloc(sizeof(*inf), GFP_KERNEL);
|
if (!inf) {
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ret = -ENOMEM;
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return ret;
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}
|
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ret = ov2685_ioctl(sd, cmd, inf);
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if (!ret)
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ret = copy_to_user(up, inf, sizeof(*inf));
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kfree(inf);
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break;
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case RKMODULE_AWB_CFG:
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
|
if (!cfg) {
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ret = -ENOMEM;
|
return ret;
|
}
|
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ret = copy_from_user(cfg, up, sizeof(*cfg));
|
if (!ret)
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ret = ov2685_ioctl(sd, cmd, cfg);
|
kfree(cfg);
|
break;
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case RKMODULE_SET_QUICK_STREAM:
|
ret = copy_from_user(&stream, up, sizeof(u32));
|
if (!ret)
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ret = ov2685_ioctl(sd, cmd, &stream);
|
break;
|
default:
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ret = -ENOIOCTLCMD;
|
break;
|
}
|
|
return ret;
|
}
|
#endif
|
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static int ov2685_s_stream(struct v4l2_subdev *sd, int on)
|
{
|
struct ov2685 *ov2685 = to_ov2685(sd);
|
struct i2c_client *client = ov2685->client;
|
int ret = 0;
|
|
mutex_lock(&ov2685->mutex);
|
|
on = !!on;
|
if (on == ov2685->streaming)
|
goto unlock_and_return;
|
|
if (on) {
|
/* In case these controls are set before streaming */
|
ov2685_set_exposure(ov2685, ov2685->exposure->val);
|
ov2685_set_gain(ov2685, ov2685->anal_gain->val);
|
ov2685_set_vts(ov2685, ov2685->vblank->val);
|
ov2685_enable_test_pattern(ov2685, ov2685->test_pattern->val);
|
|
ret = ov2685_write_reg(client, REG_SC_CTRL_MODE,
|
OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STREAMING);
|
if (ret)
|
goto unlock_and_return;
|
} else {
|
ret = ov2685_write_reg(client, REG_SC_CTRL_MODE,
|
OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STANDBY);
|
if (ret)
|
goto unlock_and_return;
|
}
|
|
ov2685->streaming = on;
|
|
unlock_and_return:
|
mutex_unlock(&ov2685->mutex);
|
return ret;
|
}
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
static int ov2685_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
{
|
struct ov2685 *ov2685 = to_ov2685(sd);
|
struct v4l2_mbus_framefmt *try_fmt;
|
|
mutex_lock(&ov2685->mutex);
|
|
try_fmt = v4l2_subdev_get_try_format(sd, fh->pad, 0);
|
/* Initialize try_fmt */
|
ov2685_fill_fmt(ov2685, try_fmt);
|
|
mutex_unlock(&ov2685->mutex);
|
|
return 0;
|
}
|
#endif
|
|
static int ov2685_runtime_resume(struct device *dev)
|
{
|
struct i2c_client *client = to_i2c_client(dev);
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct ov2685 *ov2685 = to_ov2685(sd);
|
int ret;
|
|
ret = __ov2685_power_on(ov2685);
|
if (ret)
|
return ret;
|
|
if (ov2685->streaming) {
|
ret = ov2685_s_stream(sd, 1);
|
if (ret)
|
__ov2685_power_off(ov2685);
|
}
|
|
return ret;
|
}
|
|
static int ov2685_runtime_suspend(struct device *dev)
|
{
|
struct i2c_client *client = to_i2c_client(dev);
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct ov2685 *ov2685 = to_ov2685(sd);
|
|
__ov2685_power_off(ov2685);
|
|
return 0;
|
}
|
|
static const struct dev_pm_ops ov2685_pm_ops = {
|
SET_RUNTIME_PM_OPS(ov2685_runtime_suspend,
|
ov2685_runtime_resume, NULL)
|
};
|
|
static int ov2685_set_ctrl(struct v4l2_ctrl *ctrl)
|
{
|
struct ov2685 *ov2685 = container_of(ctrl->handler,
|
struct ov2685, ctrl_handler);
|
struct i2c_client *client = ov2685->client;
|
s64 max;
|
int ret = 0;
|
|
/* Propagate change of current control to all related controls */
|
switch (ctrl->id) {
|
case V4L2_CID_VBLANK:
|
/* Update max exposure while meeting expected vblanking */
|
max = ov2685->cur_mode->height + ctrl->val - 4;
|
__v4l2_ctrl_modify_range(ov2685->exposure,
|
ov2685->exposure->minimum, max,
|
ov2685->exposure->step,
|
ov2685->exposure->default_value);
|
break;
|
}
|
|
if (!pm_runtime_get_if_in_use(&client->dev))
|
return 0;
|
switch (ctrl->id) {
|
case V4L2_CID_EXPOSURE:
|
ov2685_set_exposure(ov2685, ctrl->val);
|
break;
|
case V4L2_CID_ANALOGUE_GAIN:
|
ov2685_set_gain(ov2685, ctrl->val);
|
break;
|
case V4L2_CID_VBLANK:
|
ov2685_set_vts(ov2685, ctrl->val);
|
break;
|
case V4L2_CID_TEST_PATTERN:
|
ov2685_enable_test_pattern(ov2685, ctrl->val);
|
break;
|
default:
|
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
__func__, ctrl->id, ctrl->val);
|
break;
|
};
|
pm_runtime_put(&client->dev);
|
|
return ret;
|
}
|
|
static int ov2685_enum_frame_interval(struct v4l2_subdev *sd,
|
struct v4l2_subdev_pad_config *cfg,
|
struct v4l2_subdev_frame_interval_enum *fie)
|
{
|
if (fie->index >= ARRAY_SIZE(supported_modes))
|
return -EINVAL;
|
|
if (fie->code != MEDIA_BUS_FMT_SBGGR10_1X10)
|
return -EINVAL;
|
|
fie->width = supported_modes[fie->index].width;
|
fie->height = supported_modes[fie->index].height;
|
fie->interval = supported_modes[fie->index].max_fps;
|
return 0;
|
}
|
|
static int ov2685_g_mbus_config(struct v4l2_subdev *sd,
|
struct v4l2_mbus_config *config)
|
{
|
u32 val = 0;
|
|
val = 1 << (OV2685_LANES - 1) |
|
V4L2_MBUS_CSI2_CHANNEL_0 |
|
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
|
config->type = V4L2_MBUS_CSI2;
|
config->flags = val;
|
|
return 0;
|
}
|
|
static struct v4l2_subdev_core_ops ov2685_core_ops = {
|
.s_power = ov2685_s_power,
|
.ioctl = ov2685_ioctl,
|
#ifdef CONFIG_COMPAT
|
.compat_ioctl32 = ov2685_compat_ioctl32,
|
#endif
|
};
|
|
static struct v4l2_subdev_video_ops ov2685_video_ops = {
|
.s_stream = ov2685_s_stream,
|
.g_mbus_config = ov2685_g_mbus_config,
|
};
|
|
static struct v4l2_subdev_pad_ops ov2685_pad_ops = {
|
.enum_mbus_code = ov2685_enum_mbus_code,
|
.enum_frame_size = ov2685_enum_frame_sizes,
|
.enum_frame_interval = ov2685_enum_frame_interval,
|
.get_fmt = ov2685_get_fmt,
|
.set_fmt = ov2685_set_fmt,
|
};
|
|
static struct v4l2_subdev_ops ov2685_subdev_ops = {
|
.core = &ov2685_core_ops,
|
.video = &ov2685_video_ops,
|
.pad = &ov2685_pad_ops,
|
};
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
static const struct v4l2_subdev_internal_ops ov2685_internal_ops = {
|
.open = ov2685_open,
|
};
|
#endif
|
|
static const struct v4l2_ctrl_ops ov2685_ctrl_ops = {
|
.s_ctrl = ov2685_set_ctrl,
|
};
|
|
static int ov2685_initialize_controls(struct ov2685 *ov2685)
|
{
|
const struct ov2685_mode *mode;
|
struct v4l2_ctrl_handler *handler;
|
struct v4l2_ctrl *ctrl;
|
u64 exposure_max;
|
u32 pixel_rate, h_blank;
|
int ret;
|
|
handler = &ov2685->ctrl_handler;
|
mode = ov2685->cur_mode;
|
ret = v4l2_ctrl_handler_init(handler, 1);
|
if (ret)
|
return ret;
|
handler->lock = &ov2685->mutex;
|
|
ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
|
0, 0, link_freq_menu_items);
|
if (ctrl)
|
ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
pixel_rate = (link_freq_menu_items[0] * 2 * OV2685_LANES) /
|
OV2685_BITS_PER_SAMPLE;
|
v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
|
0, pixel_rate, 1, pixel_rate);
|
|
h_blank = mode->hts_def - mode->width;
|
ov2685->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
|
h_blank, h_blank, 1, h_blank);
|
if (ov2685->hblank)
|
ov2685->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
ov2685->vblank = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
|
V4L2_CID_VBLANK, mode->vts_def - mode->height,
|
OV2685_VTS_MAX - mode->height, 1,
|
mode->vts_def - mode->height);
|
|
exposure_max = mode->vts_def - 4;
|
ov2685->exposure = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
|
V4L2_CID_EXPOSURE, OV2685_EXPOSURE_MIN,
|
exposure_max, OV2685_EXPOSURE_STEP,
|
mode->exp_def);
|
|
ov2685->anal_gain = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops,
|
V4L2_CID_ANALOGUE_GAIN, OV2685_GAIN_MIN,
|
OV2685_GAIN_MAX, OV2685_GAIN_STEP,
|
OV2685_GAIN_DEFAULT);
|
|
ov2685->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
|
&ov2685_ctrl_ops, V4L2_CID_TEST_PATTERN,
|
ARRAY_SIZE(ov2685_test_pattern_menu) - 1,
|
0, 0, ov2685_test_pattern_menu);
|
|
if (handler->error) {
|
v4l2_ctrl_handler_free(handler);
|
return handler->error;
|
}
|
|
ov2685->subdev.ctrl_handler = handler;
|
|
return 0;
|
}
|
|
static int ov2685_check_sensor_id(struct ov2685 *ov2685,
|
struct i2c_client *client)
|
{
|
struct device *dev = &ov2685->client->dev;
|
int id, ret;
|
|
ret = __ov2685_power_on(ov2685);
|
if (ret)
|
return ret;
|
ov2685_read_reg(client, OV2685_REG_CHIP_ID,
|
OV2685_REG_VALUE_16BIT, &id);
|
__ov2685_power_off(ov2685);
|
|
if (id != CHIP_ID) {
|
dev_err(dev, "Wrong camera sensor id(%04x)\n", id);
|
return -EINVAL;
|
}
|
|
dev_info(dev, "Detected OV%04x sensor\n", CHIP_ID);
|
|
return 0;
|
}
|
|
static int ov2685_probe(struct i2c_client *client,
|
const struct i2c_device_id *id)
|
{
|
struct device *dev = &client->dev;
|
struct device_node *node = dev->of_node;
|
struct ov2685 *ov2685;
|
struct v4l2_subdev *sd;
|
char facing[2];
|
int ret;
|
|
dev_info(dev, "driver version: %02x.%02x.%02x",
|
DRIVER_VERSION >> 16,
|
(DRIVER_VERSION & 0xff00) >> 8,
|
DRIVER_VERSION & 0x00ff);
|
|
ov2685 = devm_kzalloc(dev, sizeof(*ov2685), GFP_KERNEL);
|
if (!ov2685)
|
return -ENOMEM;
|
|
ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
|
&ov2685->module_index);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
|
&ov2685->module_facing);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
|
&ov2685->module_name);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
|
&ov2685->len_name);
|
if (ret) {
|
dev_err(dev, "could not get module information!\n");
|
return -EINVAL;
|
}
|
|
ov2685->client = client;
|
ov2685->cur_mode = &supported_modes[0];
|
|
ov2685->xvclk = devm_clk_get(dev, "xvclk");
|
if (IS_ERR(ov2685->xvclk)) {
|
dev_err(dev, "Failed to get xvclk\n");
|
return -EINVAL;
|
}
|
|
ov2685->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
|
if (IS_ERR(ov2685->reset_gpio)) {
|
dev_err(dev, "Failed to get reset-gpios\n");
|
return -EINVAL;
|
}
|
|
ov2685->avdd_regulator = devm_regulator_get(dev, "avdd");
|
if (IS_ERR(ov2685->avdd_regulator)) {
|
dev_err(dev, "Failed to get avdd-supply\n");
|
return -EINVAL;
|
}
|
ov2685->dovdd_regulator = devm_regulator_get(dev, "dovdd");
|
if (IS_ERR(ov2685->dovdd_regulator)) {
|
dev_err(dev, "Failed to get dovdd-supply\n");
|
return -EINVAL;
|
}
|
|
mutex_init(&ov2685->mutex);
|
v4l2_i2c_subdev_init(&ov2685->subdev, client, &ov2685_subdev_ops);
|
ret = ov2685_initialize_controls(ov2685);
|
if (ret)
|
goto destroy_mutex;
|
|
ret = ov2685_check_sensor_id(ov2685, client);
|
if (ret)
|
return ret;
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
ov2685->subdev.internal_ops = &ov2685_internal_ops;
|
#endif
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
ov2685->pad.flags = MEDIA_PAD_FL_SOURCE;
|
ov2685->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
|
V4L2_SUBDEV_FL_HAS_EVENTS;
|
ov2685->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
ret = media_entity_pads_init(&ov2685->subdev.entity, 1, &ov2685->pad);
|
if (ret < 0)
|
goto free_ctrl_handler;
|
#endif
|
|
sd = &ov2685->subdev;
|
memset(facing, 0, sizeof(facing));
|
if (strcmp(ov2685->module_facing, "back") == 0)
|
facing[0] = 'b';
|
else
|
facing[0] = 'f';
|
|
snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
|
ov2685->module_index, facing,
|
OV2685_NAME, dev_name(sd->dev));
|
ret = v4l2_async_register_subdev_sensor_common(sd);
|
if (ret) {
|
dev_err(dev, "v4l2 async register subdev failed\n");
|
goto clean_entity;
|
}
|
|
pm_runtime_enable(dev);
|
return 0;
|
|
clean_entity:
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
media_entity_cleanup(&ov2685->subdev.entity);
|
#endif
|
free_ctrl_handler:
|
v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
|
destroy_mutex:
|
mutex_destroy(&ov2685->mutex);
|
|
return ret;
|
}
|
|
static int ov2685_remove(struct i2c_client *client)
|
{
|
struct ov2685 *ov2685 = i2c_get_clientdata(client);
|
|
__ov2685_power_off(ov2685);
|
v4l2_async_unregister_subdev(&ov2685->subdev);
|
media_entity_cleanup(&ov2685->subdev.entity);
|
v4l2_ctrl_handler_free(&ov2685->ctrl_handler);
|
mutex_destroy(&ov2685->mutex);
|
|
return 0;
|
}
|
|
static const struct of_device_id ov2685_of_match[] = {
|
{ .compatible = "ovti,ov2685" },
|
{},
|
};
|
|
static struct i2c_driver ov2685_i2c_driver = {
|
.driver = {
|
.name = OV2685_NAME,
|
.owner = THIS_MODULE,
|
.pm = &ov2685_pm_ops,
|
.of_match_table = ov2685_of_match
|
},
|
.probe = &ov2685_probe,
|
.remove = &ov2685_remove,
|
};
|
|
module_i2c_driver(ov2685_i2c_driver);
|
|
MODULE_DESCRIPTION("OmniVision ov2685 sensor driver");
|
MODULE_LICENSE("GPL v2");
|
