// SPDX-License-Identifier: GPL-2.0
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/*
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* imx241 camera driver
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*
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* Copyright (C) 2022 Rockchip Electronics Co., Ltd.
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*
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* V0.0X01.0X00 first version.
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* V0.0X01.0X01 fix compile errors.
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* V0.0X01.0X02 add 4lane mode support.
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*
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#include <media/v4l2-fwnode.h>
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#include <media/v4l2-mediabus.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/rk-preisp.h>
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#include <linux/of_graph.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x02)
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#ifndef V4L2_CID_DIGITAL_GAIN
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#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
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#endif
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#define IMX241_LINK_FREQ_400MHZ 400000000U
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/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
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#define IMX241_PIXEL_RATE (IMX241_LINK_FREQ_400MHZ * 2LL * 2LL / 10LL)
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#define IMX241_XVCLK_FREQ 24000000
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#define CHIP_ID 0x40
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#define IMX241_REG_CHIP_ID 0x3032
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#define IMX241_REG_CTRL_MODE 0x0100
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#define IMX241_MODE_SW_STANDBY 0x0
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#define IMX241_MODE_STREAMING BIT(0)
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#define IMX241_REG_EXPOSURE 0x0202
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#define IMX241_EXPOSURE_MIN 1
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#define IMX241_EXPOSURE_STEP 1
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#define IMX241_VTS_MAX 0xffff
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#define IMX241_REG_GAIN 0x0205
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#define IMX241_GAIN_MIN 0x100
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#define IMX241_GAIN_MAX 0x1000
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#define IMX241_GAIN_STEP 0x1
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#define IMX241_GAIN_DEFAULT (8 * IMX241_GAIN_MIN)
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#define IMX241_REG_TEST_PATTERN 0x0600
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#define IMX241_TEST_PATTERN_ENABLE 0x100
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#define IMX241_TEST_PATTERN_DISABLE 0x0
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#define IMX241_REG_VTS 0x0340
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#define REG_NULL 0xFFFF
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#define IMX241_REG_VALUE_08BIT 1
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#define IMX241_REG_VALUE_16BIT 2
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#define IMX241_REG_VALUE_24BIT 3
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#define IMX241_BITS_PER_SAMPLE 10
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#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
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#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
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#define IMX241_NAME "imx241"
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#define IMX241_MEDIA_BUS_FMT MEDIA_BUS_FMT_SRGGB10_1X10
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static const char * const imx241_supply_names[] = {
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"avdd", /* Analog power */
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"dovdd", /* Digital I/O power */
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"dvdd", /* Digital core power */
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};
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#define IMX241_NUM_SUPPLIES ARRAY_SIZE(imx241_supply_names)
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struct regval {
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u16 addr;
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u8 val;
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};
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struct imx241_mode {
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u32 bus_fmt;
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u32 width;
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u32 height;
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struct v4l2_fract max_fps;
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u32 hts_def;
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u32 vts_def;
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u32 exp_def;
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u32 link_freq_idx;
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u32 bpp;
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const struct regval *reg_list;
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};
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struct imx241 {
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *power_gpio;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *pwdn_gpio;
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struct regulator_bulk_data supplies[IMX241_NUM_SUPPLIES];
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default;
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struct pinctrl_state *pins_sleep;
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *exposure;
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struct v4l2_ctrl *anal_gain;
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struct v4l2_ctrl *digi_gain;
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struct v4l2_ctrl *hblank;
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struct v4l2_ctrl *vblank;
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struct v4l2_ctrl *pixel_rate;
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struct v4l2_ctrl *link_freq;
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struct v4l2_ctrl *test_pattern;
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struct mutex mutex;
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struct v4l2_fwnode_endpoint bus_cfg;
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bool streaming;
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bool power_on;
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const struct imx241_mode *support_modes;
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const struct imx241_mode *cur_mode;
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u32 module_index;
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u32 cfg_num;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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struct rkmodule_inf module_inf;
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struct rkmodule_awb_cfg awb_cfg;
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struct rkmodule_lsc_cfg lsc_cfg;
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};
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#define to_imx241(sd) container_of(sd, struct imx241, subdev)
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static const struct regval imx241_2592x1944_30fps_regs_2lane[] = {
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{0x0101, 0x00},
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{0x303C, 0x4B}, // 24M MCLK
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{0x303D, 0x00},
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{0x3041, 0xD7},
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{0x30E0, 0x00},
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{0x30E1, 0x00},
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{0x30F6, 0x00}, //Embedded Data Line output control
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{0x34CE, 0xFF},
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// Mode Setting
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{0x0340, 0x08},
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{0x0341, 0xF0}, // 2288, lines vts
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{0x0342, 0x05},
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{0x0343, 0xB0}, // 1456, line length / 2, hts / 2
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{0x0344, 0x00}, // x_addr_start[12:8]
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{0x0345, 0x00}, // x_addr_start[7:0]
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{0x0346, 0x00}, // y_addr_start[11:8]
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{0x0347, 0x00}, // y_addr_start[7:0]
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{0x0348, 0x0A}, // x_addr_end[12:8]
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{0x0349, 0x1F}, // x_addr_end[7:0], 2591
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{0x034A, 0x07}, // y_addr_end[11:8]
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{0x034B, 0x97}, // y_addr_end[7:0], 1943
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/* binning setting */
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{0x0381, 0x01}, // x_even_inc[3:0]
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{0x0383, 0x01}, // x_odd_inc[3:0]
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{0x0385, 0x01}, // y_even_inc[3:0]
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{0x0387, 0x01}, // y_odd_inc[3:0]
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{0x3048, 0x20},
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{0x30D5, 0x00},
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{0x3165, 0x20},
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{0x30D1, 0x00},
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{0x30D0, 0x2A},
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{0x3102, 0x13},
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{0x3103, 0x47},
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{0x3049, 0x01},
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{0x304D, 0x02},
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{0x304C, 0xD7},
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{0x0112, 0x0A},
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{0x0113, 0x0A},
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{0x034C, 0x0A}, // x_output_size[12:8]
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{0x034D, 0x20}, // x_output_size[7:0], 2592
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{0x034E, 0x07}, // y_output_size[11:8]
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{0x034F, 0x98}, // y_output_size[7:0], 1944
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/*
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* Frame Rate [frame/s] = Logic Clock/(frame_length_lines x line_length_pck)
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* Logic Clock
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* = PLCK (PLL output clock frequency) x Logic clock division ratio
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* = (INCK frequency x PreDivider ratio setting x PLL multiplier setting ) x
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* Divider2 frequency division ratio x Divider4 frequency division ratio
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*
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* PLCK = 24M x (1/3) x 125 = 1000M
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* Logic Clock = 1000M x (1/5) x (1/2) = 100M
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* fps = 100M / 2288 / 1456 = 30fps
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*/
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{0x0305, 0x03}, // Pre Dividers setting, 1/3
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{0x0307, 0x7D}, // PLL multiplication setting, 125
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{0x3037, 0x0A}, // Divider2: Pre divider setting, 1/5
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{0x3038, 0x01}, // Divider4: Logic Clock divider setting, 1/2
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{0x303E, 0x01}, // Divider3: CK_PIXEL divider setting, 1/2
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{0x30A2, 0x0E},
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{0x30A5, 0x60},
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{0x30A7, 0x40},
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{0x31AA, 0x02},
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{0x3301, 0x00},
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{0x3318, 0x60}, // MIPI Global Timing
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{0x0202, 0x08}, // coarse_integration_time
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{0x0203, 0xEB},
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{0x0204, 0x00},
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{0x0205, 0x00}, // analogue_gain_code_global
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{0x020E, 0x01}, // DIG_GAIN_GR [15:8]
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{0x020F, 0x00}, // DIG_GAIN_GR [7:0]
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{0x0210, 0x01}, // DIG_GAIN_R [15:8]
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{0x0211, 0x00}, // DIG_GAIN_R [7:0]
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{0x0212, 0x01}, // DIG_GAIN_B [15:8]
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{0x0213, 0x00}, // DIG_GAIN_B [15:8]
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{0x0215, 0x00}, // DIG_GAIN_B [7:0]
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{0x0100, 0x00},
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{0xFFFF, 0xFF},
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};
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static const struct imx241_mode supported_modes_2lane[] = {
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{
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.width = 2592,
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.height = 1944,
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.max_fps = {
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.numerator = 10000,
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.denominator = 300000,
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},
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.exp_def = 0x0630,
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.hts_def = 0xBE0,
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.vts_def = 0x08F0,
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.bpp = 10,
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.bus_fmt = IMX241_MEDIA_BUS_FMT,
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.reg_list = imx241_2592x1944_30fps_regs_2lane,
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.link_freq_idx = 0,
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},
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};
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static const s64 link_freq_items[] = {
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IMX241_LINK_FREQ_400MHZ,
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};
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static const char * const imx241_test_pattern_menu[] = {
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"Disabled",
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"Solid Clolor",
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"100% Color Bar",
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"Fade to grey Color Bar",
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"PN9"
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};
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/* Write registers up to 4 at a time */
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static int imx241_write_reg(struct i2c_client *client, u16 reg,
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u32 len, u32 val)
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{
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u32 buf_i, val_i;
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u8 buf[6];
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u8 *val_p;
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__be32 val_be;
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dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
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if (len > 4)
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return -EINVAL;
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buf[0] = reg >> 8;
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buf[1] = reg & 0xff;
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val_be = cpu_to_be32(val);
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val_p = (u8 *)&val_be;
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buf_i = 2;
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val_i = 4 - len;
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while (val_i < 4)
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buf[buf_i++] = val_p[val_i++];
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if (i2c_master_send(client, buf, len + 2) != len + 2)
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return -EIO;
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return 0;
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}
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static int imx241_write_array(struct i2c_client *client,
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const struct regval *regs)
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{
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u32 i;
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int ret = 0;
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for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
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ret = imx241_write_reg(client, regs[i].addr,
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IMX241_REG_VALUE_08BIT,
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regs[i].val);
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return ret;
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}
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/* Read registers up to 4 at a time */
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static int imx241_read_reg(struct i2c_client *client, u16 reg,
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unsigned int len, u32 *val)
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{
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struct i2c_msg msgs[2];
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u8 *data_be_p;
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__be32 data_be = 0;
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__be16 reg_addr_be = cpu_to_be16(reg);
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int ret;
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if (len > 4 || !len)
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return -EINVAL;
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data_be_p = (u8 *)&data_be;
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/* Write register address */
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msgs[0].addr = client->addr;
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msgs[0].flags = 0;
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msgs[0].len = 2;
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msgs[0].buf = (u8 *)®_addr_be;
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/* Read data from register */
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msgs[1].addr = client->addr;
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msgs[1].flags = I2C_M_RD;
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msgs[1].len = len;
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msgs[1].buf = &data_be_p[4 - len];
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs))
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return -EIO;
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*val = be32_to_cpu(data_be);
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return 0;
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}
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static int imx241_get_reso_dist(const struct imx241_mode *mode,
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struct v4l2_mbus_framefmt *framefmt)
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{
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return abs(mode->width - framefmt->width) +
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abs(mode->height - framefmt->height);
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}
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static const struct imx241_mode *
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imx241_find_best_fit(struct imx241 *imx241, struct v4l2_subdev_format *fmt)
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{
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struct v4l2_mbus_framefmt *framefmt = &fmt->format;
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int dist;
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int cur_best_fit = 0;
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int cur_best_fit_dist = -1;
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unsigned int i;
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for (i = 0; i < imx241->cfg_num; i++) {
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dist = imx241_get_reso_dist(&imx241->support_modes[i], framefmt);
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if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
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cur_best_fit_dist = dist;
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cur_best_fit = i;
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}
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}
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return &imx241->support_modes[cur_best_fit];
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}
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static int imx241_set_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_format *fmt)
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{
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struct imx241 *imx241 = to_imx241(sd);
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const struct imx241_mode *mode;
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s64 h_blank, vblank_def;
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u64 pixel_rate = 0;
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u32 lane_num = imx241->bus_cfg.bus.mipi_csi2.num_data_lanes;
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mutex_lock(&imx241->mutex);
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mode = imx241_find_best_fit(imx241, fmt);
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fmt->format.code = IMX241_MEDIA_BUS_FMT;
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fmt->format.width = mode->width;
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fmt->format.height = mode->height;
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fmt->format.field = V4L2_FIELD_NONE;
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if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
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#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
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*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
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#else
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mutex_unlock(&imx241->mutex);
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return -ENOTTY;
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#endif
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} else {
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imx241->cur_mode = mode;
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h_blank = mode->hts_def - mode->width;
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__v4l2_ctrl_modify_range(imx241->hblank, h_blank,
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h_blank, 1, h_blank);
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vblank_def = mode->vts_def - mode->height;
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__v4l2_ctrl_modify_range(imx241->vblank, vblank_def,
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IMX241_VTS_MAX - mode->height,
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1, vblank_def);
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pixel_rate = (u32)link_freq_items[mode->link_freq_idx] / mode->bpp * 2 * lane_num;
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__v4l2_ctrl_s_ctrl_int64(imx241->pixel_rate,
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pixel_rate);
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__v4l2_ctrl_s_ctrl(imx241->link_freq,
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mode->link_freq_idx);
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}
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mutex_unlock(&imx241->mutex);
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return 0;
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}
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static int imx241_get_fmt(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_format *fmt)
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{
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struct imx241 *imx241 = to_imx241(sd);
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const struct imx241_mode *mode = imx241->cur_mode;
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mutex_lock(&imx241->mutex);
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if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
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#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
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fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
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#else
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mutex_unlock(&imx241->mutex);
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return -ENOTTY;
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#endif
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} else {
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fmt->format.width = mode->width;
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fmt->format.height = mode->height;
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fmt->format.code = IMX241_MEDIA_BUS_FMT;
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fmt->format.field = V4L2_FIELD_NONE;
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}
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mutex_unlock(&imx241->mutex);
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return 0;
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}
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static int imx241_enum_mbus_code(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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if (code->index != 0)
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return -EINVAL;
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code->code = IMX241_MEDIA_BUS_FMT;
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return 0;
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}
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static int imx241_enum_frame_sizes(struct v4l2_subdev *sd,
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struct v4l2_subdev_pad_config *cfg,
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struct v4l2_subdev_frame_size_enum *fse)
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{
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struct imx241 *imx241 = to_imx241(sd);
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if (fse->index >= imx241->cfg_num)
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return -EINVAL;
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if (fse->code != IMX241_MEDIA_BUS_FMT)
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return -EINVAL;
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fse->min_width = imx241->support_modes[fse->index].width;
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fse->max_width = imx241->support_modes[fse->index].width;
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fse->max_height = imx241->support_modes[fse->index].height;
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fse->min_height = imx241->support_modes[fse->index].height;
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return 0;
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}
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static int imx241_enable_test_pattern(struct imx241 *imx241, u32 pattern)
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{
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if (pattern == 0)
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return 0;
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dev_err(&imx241->client->dev, "test pattern %u not implement yet.\n", pattern);
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return -EINVAL;
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}
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static int imx241_g_frame_interval(struct v4l2_subdev *sd,
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struct v4l2_subdev_frame_interval *fi)
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{
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struct imx241 *imx241 = to_imx241(sd);
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const struct imx241_mode *mode = imx241->cur_mode;
|
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mutex_lock(&imx241->mutex);
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fi->interval = mode->max_fps;
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mutex_unlock(&imx241->mutex);
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return 0;
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}
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static void imx241_get_module_inf(struct imx241 *imx241,
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struct rkmodule_inf *inf)
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{
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memset(inf, 0, sizeof(*inf));
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strscpy(inf->base.sensor, IMX241_NAME, sizeof(inf->base.sensor));
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strscpy(inf->base.module, imx241->module_name,
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sizeof(inf->base.module));
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strscpy(inf->base.lens, imx241->len_name, sizeof(inf->base.lens));
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}
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static void imx241_set_awb_cfg(struct imx241 *imx241,
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struct rkmodule_awb_cfg *cfg)
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{
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mutex_lock(&imx241->mutex);
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memcpy(&imx241->awb_cfg, cfg, sizeof(*cfg));
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mutex_unlock(&imx241->mutex);
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}
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static void imx241_set_lsc_cfg(struct imx241 *imx241,
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struct rkmodule_lsc_cfg *cfg)
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{
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mutex_lock(&imx241->mutex);
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memcpy(&imx241->lsc_cfg, cfg, sizeof(*cfg));
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mutex_unlock(&imx241->mutex);
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}
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static long imx241_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
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{
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struct imx241 *imx241 = to_imx241(sd);
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struct rkmodule_hdr_cfg *hdr;
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long ret = 0;
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u32 stream = 0;
|
|
switch (cmd) {
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case RKMODULE_GET_MODULE_INFO:
|
imx241_get_module_inf(imx241, (struct rkmodule_inf *)arg);
|
break;
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case RKMODULE_AWB_CFG:
|
imx241_set_awb_cfg(imx241, (struct rkmodule_awb_cfg *)arg);
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break;
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case RKMODULE_LSC_CFG:
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imx241_set_lsc_cfg(imx241, (struct rkmodule_lsc_cfg *)arg);
|
break;
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case RKMODULE_SET_QUICK_STREAM:
|
stream = *((u32 *)arg);
|
|
if (stream)
|
ret = imx241_write_reg(imx241->client,
|
IMX241_REG_CTRL_MODE,
|
IMX241_REG_VALUE_08BIT,
|
IMX241_MODE_STREAMING);
|
else
|
ret = imx241_write_reg(imx241->client,
|
IMX241_REG_CTRL_MODE,
|
IMX241_REG_VALUE_08BIT,
|
IMX241_MODE_SW_STANDBY);
|
break;
|
case RKMODULE_GET_HDR_CFG:
|
hdr = (struct rkmodule_hdr_cfg *)arg;
|
hdr->esp.mode = HDR_NORMAL_VC;
|
hdr->hdr_mode = NO_HDR;
|
break;
|
case RKMODULE_SET_HDR_CFG:
|
ret = 0;
|
break;
|
default:
|
ret = -ENOIOCTLCMD;
|
break;
|
}
|
|
return ret;
|
}
|
|
#ifdef CONFIG_COMPAT
|
static long imx241_compat_ioctl32(struct v4l2_subdev *sd,
|
unsigned int cmd, unsigned long arg)
|
{
|
void __user *up = compat_ptr(arg);
|
struct rkmodule_inf *inf;
|
struct rkmodule_awb_cfg *cfg;
|
struct rkmodule_lsc_cfg *lsc_cfg;
|
long ret = 0;
|
u32 stream = 0;
|
|
switch (cmd) {
|
case RKMODULE_GET_MODULE_INFO:
|
inf = kzalloc(sizeof(*inf), GFP_KERNEL);
|
if (!inf) {
|
ret = -ENOMEM;
|
return ret;
|
}
|
|
ret = imx241_ioctl(sd, cmd, inf);
|
if (!ret) {
|
ret = copy_to_user(up, inf, sizeof(*inf));
|
if (ret)
|
ret = -EFAULT;
|
}
|
kfree(inf);
|
break;
|
case RKMODULE_AWB_CFG:
|
cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
|
if (!cfg) {
|
ret = -ENOMEM;
|
return ret;
|
}
|
|
ret = copy_from_user(cfg, up, sizeof(*cfg));
|
if (!ret)
|
ret = imx241_ioctl(sd, cmd, cfg);
|
else
|
ret = -EFAULT;
|
kfree(cfg);
|
break;
|
case RKMODULE_LSC_CFG:
|
lsc_cfg = kzalloc(sizeof(*lsc_cfg), GFP_KERNEL);
|
if (!lsc_cfg) {
|
ret = -ENOMEM;
|
return ret;
|
}
|
|
ret = copy_from_user(lsc_cfg, up, sizeof(*lsc_cfg));
|
if (!ret)
|
ret = imx241_ioctl(sd, cmd, lsc_cfg);
|
else
|
ret = -EFAULT;
|
kfree(lsc_cfg);
|
break;
|
case RKMODULE_SET_QUICK_STREAM:
|
ret = copy_from_user(&stream, up, sizeof(u32));
|
if (!ret)
|
ret = imx241_ioctl(sd, cmd, &stream);
|
else
|
ret = -EFAULT;
|
break;
|
default:
|
ret = -ENOIOCTLCMD;
|
break;
|
}
|
|
return ret;
|
}
|
#endif
|
|
static int __imx241_start_stream(struct imx241 *imx241)
|
{
|
int ret;
|
|
ret = imx241_write_array(imx241->client, imx241->cur_mode->reg_list);
|
if (ret)
|
return ret;
|
|
/* In case these controls are set before streaming */
|
mutex_unlock(&imx241->mutex);
|
ret = v4l2_ctrl_handler_setup(&imx241->ctrl_handler);
|
mutex_lock(&imx241->mutex);
|
if (ret)
|
return ret;
|
|
return imx241_write_reg(imx241->client,
|
IMX241_REG_CTRL_MODE,
|
IMX241_REG_VALUE_08BIT,
|
IMX241_MODE_STREAMING);
|
}
|
|
static int __imx241_stop_stream(struct imx241 *imx241)
|
{
|
return imx241_write_reg(imx241->client,
|
IMX241_REG_CTRL_MODE,
|
IMX241_REG_VALUE_08BIT,
|
IMX241_MODE_SW_STANDBY);
|
}
|
|
static int imx241_s_stream(struct v4l2_subdev *sd, int on)
|
{
|
struct imx241 *imx241 = to_imx241(sd);
|
struct i2c_client *client = imx241->client;
|
int ret = 0;
|
|
dev_info(&client->dev, "%s: on: %d, %dx%d@%d\n", __func__, on,
|
imx241->cur_mode->width,
|
imx241->cur_mode->height,
|
DIV_ROUND_CLOSEST(imx241->cur_mode->max_fps.denominator,
|
imx241->cur_mode->max_fps.numerator));
|
|
|
mutex_lock(&imx241->mutex);
|
on = !!on;
|
if (on == imx241->streaming)
|
goto unlock_and_return;
|
|
if (on) {
|
ret = pm_runtime_get_sync(&client->dev);
|
if (ret < 0) {
|
pm_runtime_put_noidle(&client->dev);
|
goto unlock_and_return;
|
}
|
|
ret = __imx241_start_stream(imx241);
|
if (ret) {
|
v4l2_err(sd, "start stream failed while write regs\n");
|
pm_runtime_put(&client->dev);
|
goto unlock_and_return;
|
}
|
} else {
|
__imx241_stop_stream(imx241);
|
pm_runtime_put(&client->dev);
|
}
|
|
imx241->streaming = on;
|
|
unlock_and_return:
|
mutex_unlock(&imx241->mutex);
|
|
return ret;
|
}
|
|
static int imx241_s_power(struct v4l2_subdev *sd, int on)
|
{
|
struct imx241 *imx241 = to_imx241(sd);
|
struct i2c_client *client = imx241->client;
|
int ret = 0;
|
|
mutex_lock(&imx241->mutex);
|
|
/* If the power state is not modified - no work to do. */
|
if (imx241->power_on == !!on)
|
goto unlock_and_return;
|
|
if (on) {
|
ret = pm_runtime_get_sync(&client->dev);
|
if (ret < 0) {
|
pm_runtime_put_noidle(&client->dev);
|
goto unlock_and_return;
|
}
|
|
imx241->power_on = true;
|
} else {
|
pm_runtime_put(&client->dev);
|
imx241->power_on = false;
|
}
|
|
unlock_and_return:
|
mutex_unlock(&imx241->mutex);
|
|
return ret;
|
}
|
|
/* Calculate the delay in us by clock rate and clock cycles */
|
static inline u32 imx241_cal_delay(u32 cycles)
|
{
|
return DIV_ROUND_UP(cycles, IMX241_XVCLK_FREQ / 1000 / 1000);
|
}
|
|
static int __imx241_power_on(struct imx241 *imx241)
|
{
|
int ret;
|
u32 delay_us;
|
struct device *dev = &imx241->client->dev;
|
|
if (!IS_ERR(imx241->power_gpio))
|
gpiod_set_value_cansleep(imx241->power_gpio, 1);
|
|
usleep_range(1000, 2000);
|
|
if (!IS_ERR_OR_NULL(imx241->pins_default)) {
|
ret = pinctrl_select_state(imx241->pinctrl,
|
imx241->pins_default);
|
if (ret < 0)
|
dev_err(dev, "could not set pins\n");
|
}
|
|
ret = clk_set_rate(imx241->xvclk, IMX241_XVCLK_FREQ);
|
if (ret < 0)
|
dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
|
|
if (clk_get_rate(imx241->xvclk) != IMX241_XVCLK_FREQ)
|
dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
|
|
ret = clk_prepare_enable(imx241->xvclk);
|
if (ret < 0) {
|
dev_err(dev, "Failed to enable xvclk\n");
|
return ret;
|
}
|
|
if (!IS_ERR(imx241->reset_gpio))
|
gpiod_set_value_cansleep(imx241->reset_gpio, 0);
|
|
ret = regulator_bulk_enable(IMX241_NUM_SUPPLIES, imx241->supplies);
|
if (ret < 0) {
|
dev_err(dev, "Failed to enable regulators\n");
|
goto disable_clk;
|
}
|
|
if (!IS_ERR(imx241->reset_gpio))
|
gpiod_set_value_cansleep(imx241->reset_gpio, 1);
|
|
usleep_range(500, 1000);
|
if (!IS_ERR(imx241->pwdn_gpio))
|
gpiod_set_value_cansleep(imx241->pwdn_gpio, 1);
|
|
/* 8192 cycles prior to first SCCB transaction */
|
delay_us = imx241_cal_delay(8192);
|
usleep_range(delay_us, delay_us * 2);
|
|
return 0;
|
|
disable_clk:
|
clk_disable_unprepare(imx241->xvclk);
|
|
return ret;
|
}
|
|
static void __imx241_power_off(struct imx241 *imx241)
|
{
|
int ret;
|
struct device *dev = &imx241->client->dev;
|
|
if (!IS_ERR(imx241->pwdn_gpio))
|
gpiod_set_value_cansleep(imx241->pwdn_gpio, 0);
|
clk_disable_unprepare(imx241->xvclk);
|
if (!IS_ERR(imx241->reset_gpio))
|
gpiod_set_value_cansleep(imx241->reset_gpio, 0);
|
|
if (!IS_ERR_OR_NULL(imx241->pins_sleep)) {
|
ret = pinctrl_select_state(imx241->pinctrl,
|
imx241->pins_sleep);
|
if (ret < 0)
|
dev_dbg(dev, "could not set pins\n");
|
}
|
if (!IS_ERR(imx241->power_gpio))
|
gpiod_set_value_cansleep(imx241->power_gpio, 0);
|
|
regulator_bulk_disable(IMX241_NUM_SUPPLIES, imx241->supplies);
|
}
|
|
static int imx241_runtime_resume(struct device *dev)
|
{
|
struct i2c_client *client = to_i2c_client(dev);
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct imx241 *imx241 = to_imx241(sd);
|
|
return __imx241_power_on(imx241);
|
}
|
|
static int imx241_runtime_suspend(struct device *dev)
|
{
|
struct i2c_client *client = to_i2c_client(dev);
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct imx241 *imx241 = to_imx241(sd);
|
|
__imx241_power_off(imx241);
|
|
return 0;
|
}
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
static int imx241_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
{
|
struct imx241 *imx241 = to_imx241(sd);
|
struct v4l2_mbus_framefmt *try_fmt =
|
v4l2_subdev_get_try_format(sd, fh->pad, 0);
|
const struct imx241_mode *def_mode = &imx241->support_modes[0];
|
|
mutex_lock(&imx241->mutex);
|
/* Initialize try_fmt */
|
try_fmt->width = def_mode->width;
|
try_fmt->height = def_mode->height;
|
//try_fmt->code = def_mode->bus_fmt;
|
try_fmt->code = IMX241_MEDIA_BUS_FMT;
|
try_fmt->field = V4L2_FIELD_NONE;
|
|
mutex_unlock(&imx241->mutex);
|
/* No crop or compose */
|
|
return 0;
|
}
|
#endif
|
|
static int imx241_enum_frame_interval(struct v4l2_subdev *sd,
|
struct v4l2_subdev_pad_config *cfg,
|
struct v4l2_subdev_frame_interval_enum *fie)
|
{
|
struct imx241 *imx241 = to_imx241(sd);
|
|
if (fie->index >= imx241->cfg_num)
|
return -EINVAL;
|
|
fie->code = imx241->support_modes[fie->index].bus_fmt;
|
fie->width = imx241->support_modes[fie->index].width;
|
fie->height = imx241->support_modes[fie->index].height;
|
fie->interval = imx241->support_modes[fie->index].max_fps;
|
|
return 0;
|
}
|
|
static int imx241_g_mbus_config(struct v4l2_subdev *sd,
|
struct v4l2_mbus_config *config)
|
{
|
struct imx241 *imx241 = to_imx241(sd);
|
u32 lane_num = imx241->bus_cfg.bus.mipi_csi2.num_data_lanes;
|
u32 val = 0;
|
|
val = 1 << (lane_num - 1) |
|
V4L2_MBUS_CSI2_CHANNEL_0 |
|
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
|
|
config->type = V4L2_MBUS_CSI2;
|
config->flags = val;
|
|
return 0;
|
}
|
|
static const struct dev_pm_ops imx241_pm_ops = {
|
SET_RUNTIME_PM_OPS(imx241_runtime_suspend,
|
imx241_runtime_resume, NULL)
|
};
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
static const struct v4l2_subdev_internal_ops imx241_internal_ops = {
|
.open = imx241_open,
|
};
|
#endif
|
|
static const struct v4l2_subdev_core_ops imx241_core_ops = {
|
.s_power = imx241_s_power,
|
.ioctl = imx241_ioctl,
|
#ifdef CONFIG_COMPAT
|
.compat_ioctl32 = imx241_compat_ioctl32,
|
#endif
|
};
|
|
static const struct v4l2_subdev_video_ops imx241_video_ops = {
|
.s_stream = imx241_s_stream,
|
.g_frame_interval = imx241_g_frame_interval,
|
.g_mbus_config = imx241_g_mbus_config,
|
};
|
|
static const struct v4l2_subdev_pad_ops imx241_pad_ops = {
|
.enum_mbus_code = imx241_enum_mbus_code,
|
.enum_frame_size = imx241_enum_frame_sizes,
|
.enum_frame_interval = imx241_enum_frame_interval,
|
.get_fmt = imx241_get_fmt,
|
.set_fmt = imx241_set_fmt,
|
};
|
|
static const struct v4l2_subdev_ops imx241_subdev_ops = {
|
.core = &imx241_core_ops,
|
.video = &imx241_video_ops,
|
.pad = &imx241_pad_ops,
|
};
|
|
static int imx241_set_gain_reg(struct imx241 *imx241, u32 a_gain)
|
{
|
int ret = 0;
|
u32 gain_reg = 0;
|
|
gain_reg = (256 - (256 * 256 / a_gain));
|
if (gain_reg > 240)
|
gain_reg = 240;
|
|
ret |= imx241_write_reg(imx241->client,
|
IMX241_REG_GAIN,
|
IMX241_REG_VALUE_08BIT,
|
(gain_reg & 0xff));
|
return ret;
|
}
|
|
static int imx241_set_ctrl(struct v4l2_ctrl *ctrl)
|
{
|
struct imx241 *imx241 = container_of(ctrl->handler,
|
struct imx241, ctrl_handler);
|
struct i2c_client *client = imx241->client;
|
s64 max;
|
int ret = 0;
|
|
/* Propagate change of current control to all related controls */
|
switch (ctrl->id) {
|
case V4L2_CID_VBLANK:
|
/* Update max exposure while meeting expected vblanking */
|
max = imx241->cur_mode->height + ctrl->val - 4;
|
__v4l2_ctrl_modify_range(imx241->exposure,
|
imx241->exposure->minimum, max,
|
imx241->exposure->step,
|
imx241->exposure->default_value);
|
break;
|
}
|
|
if (!pm_runtime_get_if_in_use(&client->dev))
|
return 0;
|
|
switch (ctrl->id) {
|
case V4L2_CID_EXPOSURE:
|
/* 4 least significant bits of expsoure are fractional part */
|
ret = imx241_write_reg(imx241->client,
|
IMX241_REG_EXPOSURE,
|
IMX241_REG_VALUE_16BIT,
|
ctrl->val);
|
break;
|
case V4L2_CID_ANALOGUE_GAIN:
|
ret = imx241_set_gain_reg(imx241, ctrl->val);
|
break;
|
case V4L2_CID_VBLANK:
|
ret = imx241_write_reg(imx241->client,
|
IMX241_REG_VTS,
|
IMX241_REG_VALUE_16BIT,
|
ctrl->val + imx241->cur_mode->height);
|
break;
|
case V4L2_CID_TEST_PATTERN:
|
ret = imx241_enable_test_pattern(imx241, ctrl->val);
|
break;
|
default:
|
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
__func__, ctrl->id, ctrl->val);
|
break;
|
}
|
|
pm_runtime_put(&client->dev);
|
|
return ret;
|
}
|
|
static const struct v4l2_ctrl_ops imx241_ctrl_ops = {
|
.s_ctrl = imx241_set_ctrl,
|
};
|
|
static int imx241_initialize_controls(struct imx241 *imx241)
|
{
|
const struct imx241_mode *mode;
|
struct v4l2_ctrl_handler *handler;
|
s64 exposure_max, vblank_def;
|
u32 h_blank;
|
int ret;
|
u64 dst_pixel_rate = 0;
|
u32 lane_num = imx241->bus_cfg.bus.mipi_csi2.num_data_lanes;
|
|
handler = &imx241->ctrl_handler;
|
mode = imx241->cur_mode;
|
ret = v4l2_ctrl_handler_init(handler, 8);
|
if (ret)
|
return ret;
|
handler->lock = &imx241->mutex;
|
|
imx241->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
|
V4L2_CID_LINK_FREQ,
|
1, 0, link_freq_items);
|
|
dst_pixel_rate = (u32)link_freq_items[mode->link_freq_idx] / mode->bpp * 2 * lane_num;
|
|
imx241->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
|
V4L2_CID_PIXEL_RATE,
|
0, IMX241_PIXEL_RATE,
|
1, dst_pixel_rate);
|
|
__v4l2_ctrl_s_ctrl(imx241->link_freq,
|
mode->link_freq_idx);
|
|
h_blank = mode->hts_def - mode->width;
|
imx241->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
|
h_blank, h_blank, 1, h_blank);
|
if (imx241->hblank)
|
imx241->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
vblank_def = mode->vts_def - mode->height;
|
imx241->vblank = v4l2_ctrl_new_std(handler, &imx241_ctrl_ops,
|
V4L2_CID_VBLANK, vblank_def,
|
IMX241_VTS_MAX - mode->height,
|
1, vblank_def);
|
|
exposure_max = mode->vts_def - 5;
|
imx241->exposure = v4l2_ctrl_new_std(handler, &imx241_ctrl_ops,
|
V4L2_CID_EXPOSURE, IMX241_EXPOSURE_MIN,
|
exposure_max, IMX241_EXPOSURE_STEP,
|
mode->exp_def);
|
|
imx241->anal_gain = v4l2_ctrl_new_std(handler, &imx241_ctrl_ops,
|
V4L2_CID_ANALOGUE_GAIN, IMX241_GAIN_MIN,
|
IMX241_GAIN_MAX, IMX241_GAIN_STEP,
|
IMX241_GAIN_DEFAULT);
|
|
imx241->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
|
&imx241_ctrl_ops, V4L2_CID_TEST_PATTERN,
|
ARRAY_SIZE(imx241_test_pattern_menu) - 1,
|
0, 0, imx241_test_pattern_menu);
|
|
if (handler->error) {
|
ret = handler->error;
|
dev_err(&imx241->client->dev,
|
"Failed to init controls(%d)\n", ret);
|
goto err_free_handler;
|
}
|
|
imx241->subdev.ctrl_handler = handler;
|
|
return 0;
|
|
err_free_handler:
|
v4l2_ctrl_handler_free(handler);
|
|
return ret;
|
}
|
|
static int imx241_check_sensor_id(struct imx241 *imx241,
|
struct i2c_client *client)
|
{
|
struct device *dev = &imx241->client->dev;
|
u32 id = 0;
|
int ret;
|
|
ret = imx241_read_reg(client, IMX241_REG_CHIP_ID,
|
IMX241_REG_VALUE_08BIT, &id);
|
if (id != CHIP_ID) {
|
dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
|
return -ENODEV;
|
}
|
|
dev_info(dev, "Detected IMX241 sensor\n");
|
|
return 0;
|
}
|
|
static int imx241_configure_regulators(struct imx241 *imx241)
|
{
|
unsigned int i;
|
|
for (i = 0; i < IMX241_NUM_SUPPLIES; i++)
|
imx241->supplies[i].supply = imx241_supply_names[i];
|
|
return devm_regulator_bulk_get(&imx241->client->dev,
|
IMX241_NUM_SUPPLIES,
|
imx241->supplies);
|
}
|
|
static int imx241_probe(struct i2c_client *client,
|
const struct i2c_device_id *id)
|
{
|
struct device *dev = &client->dev;
|
struct device_node *node = dev->of_node;
|
struct imx241 *imx241;
|
struct v4l2_subdev *sd;
|
struct device_node *endpoint;
|
char facing[2];
|
int ret;
|
|
dev_info(dev, "driver version: %02x.%02x.%02x",
|
DRIVER_VERSION >> 16,
|
(DRIVER_VERSION & 0xff00) >> 8,
|
DRIVER_VERSION & 0x00ff);
|
|
imx241 = devm_kzalloc(dev, sizeof(*imx241), GFP_KERNEL);
|
if (!imx241)
|
return -ENOMEM;
|
|
ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
|
&imx241->module_index);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
|
&imx241->module_facing);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
|
&imx241->module_name);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
|
&imx241->len_name);
|
if (ret) {
|
dev_err(dev, "could not get module information!\n");
|
return -EINVAL;
|
}
|
|
imx241->client = client;
|
endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
|
if (!endpoint) {
|
dev_err(dev, "Failed to get endpoint\n");
|
return -EINVAL;
|
}
|
ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
|
&imx241->bus_cfg);
|
if (ret) {
|
dev_err(dev, "Failed to get bus cfg\n");
|
return ret;
|
}
|
|
imx241->support_modes = supported_modes_2lane;
|
imx241->cfg_num = ARRAY_SIZE(supported_modes_2lane);
|
imx241->cur_mode = &imx241->support_modes[0];
|
|
imx241->xvclk = devm_clk_get(dev, "xvclk");
|
if (IS_ERR(imx241->xvclk)) {
|
dev_err(dev, "Failed to get xvclk\n");
|
return -EINVAL;
|
}
|
|
imx241->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
|
if (IS_ERR(imx241->power_gpio))
|
dev_warn(dev, "Failed to get power-gpios, maybe no use\n");
|
|
imx241->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
|
if (IS_ERR(imx241->reset_gpio))
|
dev_warn(dev, "Failed to get reset-gpios\n");
|
|
imx241->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
|
if (IS_ERR(imx241->pwdn_gpio))
|
dev_warn(dev, "Failed to get pwdn-gpios\n");
|
|
ret = imx241_configure_regulators(imx241);
|
if (ret) {
|
dev_err(dev, "Failed to get power regulators\n");
|
return ret;
|
}
|
|
imx241->pinctrl = devm_pinctrl_get(dev);
|
if (!IS_ERR(imx241->pinctrl)) {
|
imx241->pins_default =
|
pinctrl_lookup_state(imx241->pinctrl,
|
OF_CAMERA_PINCTRL_STATE_DEFAULT);
|
if (IS_ERR(imx241->pins_default))
|
dev_err(dev, "could not get default pinstate\n");
|
|
imx241->pins_sleep =
|
pinctrl_lookup_state(imx241->pinctrl,
|
OF_CAMERA_PINCTRL_STATE_SLEEP);
|
if (IS_ERR(imx241->pins_sleep))
|
dev_err(dev, "could not get sleep pinstate\n");
|
}
|
|
mutex_init(&imx241->mutex);
|
|
sd = &imx241->subdev;
|
v4l2_i2c_subdev_init(sd, client, &imx241_subdev_ops);
|
ret = imx241_initialize_controls(imx241);
|
if (ret)
|
goto err_destroy_mutex;
|
|
ret = __imx241_power_on(imx241);
|
if (ret)
|
goto err_free_handler;
|
|
ret = imx241_check_sensor_id(imx241, client);
|
if (ret)
|
goto err_power_off;
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
sd->internal_ops = &imx241_internal_ops;
|
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
#endif
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
imx241->pad.flags = MEDIA_PAD_FL_SOURCE;
|
sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
ret = media_entity_pads_init(&sd->entity, 1, &imx241->pad);
|
if (ret < 0)
|
goto err_power_off;
|
#endif
|
|
memset(facing, 0, sizeof(facing));
|
if (strcmp(imx241->module_facing, "back") == 0)
|
facing[0] = 'b';
|
else
|
facing[0] = 'f';
|
|
snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
|
imx241->module_index, facing,
|
IMX241_NAME, dev_name(sd->dev));
|
ret = v4l2_async_register_subdev_sensor_common(sd);
|
if (ret) {
|
dev_err(dev, "v4l2 async register subdev failed\n");
|
goto err_clean_entity;
|
}
|
|
pm_runtime_set_active(dev);
|
pm_runtime_enable(dev);
|
pm_runtime_idle(dev);
|
|
return 0;
|
|
err_clean_entity:
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
media_entity_cleanup(&sd->entity);
|
#endif
|
err_power_off:
|
__imx241_power_off(imx241);
|
err_free_handler:
|
v4l2_ctrl_handler_free(&imx241->ctrl_handler);
|
err_destroy_mutex:
|
mutex_destroy(&imx241->mutex);
|
|
return ret;
|
}
|
|
static int imx241_remove(struct i2c_client *client)
|
{
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct imx241 *imx241 = to_imx241(sd);
|
|
v4l2_async_unregister_subdev(sd);
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
media_entity_cleanup(&sd->entity);
|
#endif
|
v4l2_ctrl_handler_free(&imx241->ctrl_handler);
|
mutex_destroy(&imx241->mutex);
|
|
pm_runtime_disable(&client->dev);
|
|
if (!pm_runtime_status_suspended(&client->dev))
|
__imx241_power_off(imx241);
|
|
pm_runtime_set_suspended(&client->dev);
|
|
return 0;
|
}
|
|
#if IS_ENABLED(CONFIG_OF)
|
static const struct of_device_id imx241_of_match[] = {
|
{ .compatible = "sony,imx241" },
|
{},
|
};
|
MODULE_DEVICE_TABLE(of, imx241_of_match);
|
#endif
|
|
static const struct i2c_device_id imx241_match_id[] = {
|
{ "sony,imx241", 0 },
|
{},
|
};
|
|
static struct i2c_driver imx241_i2c_driver = {
|
.driver = {
|
.name = IMX241_NAME,
|
.pm = &imx241_pm_ops,
|
.of_match_table = of_match_ptr(imx241_of_match),
|
},
|
.probe = &imx241_probe,
|
.remove = &imx241_remove,
|
.id_table = imx241_match_id,
|
};
|
|
static int __init sensor_mod_init(void)
|
{
|
return i2c_add_driver(&imx241_i2c_driver);
|
}
|
|
static void __exit sensor_mod_exit(void)
|
{
|
i2c_del_driver(&imx241_i2c_driver);
|
}
|
|
device_initcall_sync(sensor_mod_init);
|
module_exit(sensor_mod_exit);
|
|
MODULE_DESCRIPTION("Sony imx241 sensor driver");
|
MODULE_LICENSE("GPL");
|
