// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
/*
|
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
*
|
*/
|
|
/dts-v1/;
|
|
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/pinctrl/rockchip.h>
|
#include <dt-bindings/display/media-bus-format.h>
|
#include "rk3568.dtsi"
|
#include "rk3568-evb.dtsi"
|
|
/ {
|
model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
|
compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
|
|
vcc2v5_sys: vcc2v5-ddr {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc2v5-sys";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <2500000>;
|
regulator-max-microvolt = <2500000>;
|
vin-supply = <&vcc3v3_sys>;
|
};
|
|
vcc3v3_vga: vcc3v3-vga {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc3v3_vga";
|
regulator-always-on;
|
regulator-boot-on;
|
gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
|
enable-active-high;
|
vin-supply = <&vcc3v3_sys>;
|
};
|
|
pcie30_avdd0v9: pcie30-avdd0v9 {
|
compatible = "regulator-fixed";
|
regulator-name = "pcie30_avdd0v9";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <900000>;
|
regulator-max-microvolt = <900000>;
|
vin-supply = <&vcc3v3_sys>;
|
};
|
|
pcie30_avdd1v8: pcie30-avdd1v8 {
|
compatible = "regulator-fixed";
|
regulator-name = "pcie30_avdd1v8";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
vin-supply = <&vcc3v3_sys>;
|
};
|
|
vcc3v3_pcie: gpio-regulator {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc3v3_pcie";
|
regulator-min-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
enable-active-high;
|
gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
startup-delay-us = <5000>;
|
vin-supply = <&dc_12v>;
|
};
|
|
vcc3v3_bu: vcc3v3-bu {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc3v3_bu";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
vin-supply = <&vcc5v0_sys>;
|
};
|
#if 0
|
vcc_camera: vcc-camera-regulator {
|
compatible = "regulator-fixed";
|
gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&camera_pwr>;
|
regulator-name = "vcc_camera";
|
enable-active-high;
|
regulator-always-on;
|
regulator-boot-on;
|
};
|
#endif
|
|
ndj_io_init {
|
compatible = "nk_io_control";
|
pinctrl-names = "default";
|
pinctrl-0 = <&nk_io_gpio>;
|
|
//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
|
|
vcc_5v {
|
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
|
gpio_function = <0>;
|
};
|
|
vcc_12v {
|
gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
|
gpio_function = <0>;
|
};
|
|
hub_host2_rst {
|
gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
|
gpio_function = <3>;
|
};
|
|
hub_host3 {
|
gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
|
gpio_function = <0>;
|
};
|
|
wake_4g {
|
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
|
gpio_function = <0>;
|
};
|
|
air_mode_4g {
|
gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
|
gpio_function = <0>;
|
};
|
|
reset_4g {
|
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
|
gpio_function = <3>;
|
};
|
|
en_4g {
|
gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
|
gpio_function = <0>;
|
};
|
|
hp_en {
|
gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
|
gpio_function = <0>;
|
};
|
|
usb_ogt {
|
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
|
gpio_function = <0>;
|
};
|
|
m2_wifi_pwr {
|
gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
|
gpio_function = <0>;
|
};
|
|
|
#if 0
|
do1 {
|
gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
|
gpio_function = <0>;
|
};
|
|
do2 {
|
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
|
gpio_function = <0>;
|
};
|
|
do3 {
|
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
|
gpio_function = <0>;
|
};
|
|
do4 {
|
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
|
gpio_function = <0>;
|
};
|
|
do5 {
|
gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
|
gpio_function = <0>;
|
};
|
|
do6 {
|
gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
|
gpio_function = <0>;
|
};
|
|
do7 {
|
gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
|
gpio_function = <0>;
|
};
|
|
di1 {
|
gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
|
gpio_function = <1>;
|
};
|
#endif
|
};
|
|
panel: panel {
|
compatible = "simple-panel";
|
backlight = <&backlight>;
|
power-supply = <&vcc3v3_lcd0_n>;
|
enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
|
edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_PWBLK_H_GPIO0_B7
|
edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
|
bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
|
bpc = <8>;
|
prepare-delay-ms = <200>;
|
enable-delay-ms = <20>;
|
|
display-timings {
|
native-mode = <&timing>;
|
timing: timing {
|
clock-frequency = <72500000>;
|
hactive = <1280>;
|
vactive = <800>;
|
hfront-porch = <70>;
|
hsync-len = <2>;
|
hback-porch = <88>;
|
vfront-porch = <7>;
|
vsync-len = <4>;
|
vback-porch = <17>;
|
hsync-active = <21>;
|
vsync-active = <0>;
|
de-active = <0>;
|
pixelclk-active = <0>;
|
};
|
};
|
ports {
|
panel_in_lvds: endpoint {
|
remote-endpoint = <&lvds_out>;
|
};
|
};
|
};
|
};
|
|
&combphy0_us {
|
status = "okay";
|
};
|
|
&combphy1_usq {
|
status = "okay";
|
};
|
|
&combphy2_psq {
|
status = "okay";
|
};
|
|
&csi2_dphy_hw {
|
status = "disabled";
|
};
|
|
&csi2_dphy0 {
|
status = "disabled";
|
|
ports {
|
#address-cells = <1>;
|
#size-cells = <0>;
|
port@0 {
|
reg = <0>;
|
#address-cells = <1>;
|
#size-cells = <0>;
|
|
mipi_in_ucam0: endpoint@1 {
|
reg = <1>;
|
remote-endpoint = <&ucam_out0>;
|
data-lanes = <1 2 3 4>;
|
};
|
mipi_in_ucam1: endpoint@2 {
|
reg = <2>;
|
remote-endpoint = <&gc8034_out>;
|
data-lanes = <1 2 3 4>;
|
};
|
mipi_in_ucam2: endpoint@3 {
|
reg = <3>;
|
remote-endpoint = <&ov5695_out>;
|
data-lanes = <1 2>;
|
};
|
};
|
port@1 {
|
reg = <1>;
|
#address-cells = <1>;
|
#size-cells = <0>;
|
|
csidphy_out: endpoint@0 {
|
reg = <0>;
|
remote-endpoint = <&isp0_in>;
|
};
|
};
|
};
|
};
|
|
/*
|
* video_phy0 needs to be enabled
|
* when dsi0 is enabled
|
*/
|
&dsi0 {
|
status = "disabled";
|
};
|
|
&dsi0_in_vp0 {
|
status = "disabled";
|
};
|
|
&dsi0_in_vp1 {
|
status = "disabled";
|
};
|
|
&dsi0_panel {
|
power-supply = <&vcc3v3_lcd0_n>;
|
};
|
|
/*
|
* video_phy1 needs to be enabled
|
* when dsi1 is enabled
|
*/
|
&dsi1 {
|
status = "disabled";
|
};
|
|
&dsi1_in_vp0 {
|
status = "disabled";
|
};
|
|
&dsi1_in_vp1 {
|
status = "disabled";
|
};
|
|
&dsi1_panel {
|
power-supply = <&vcc3v3_lcd1_n>;
|
};
|
|
&edp {
|
//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
|
force-hpd;
|
status = "disabled";
|
};
|
|
&lvds {
|
status = "okay";
|
ports {
|
port@1 {
|
reg = <1>;
|
lvds_out: endpoint {
|
remote-endpoint = <&panel_in_lvds>;
|
};
|
};
|
|
};
|
};
|
|
&route_lvds{
|
status = "okay";
|
connect = <&vp2_out_lvds>;
|
};
|
|
&lvds_in_vp2 {
|
status = "okay";
|
};
|
|
&edp_phy {
|
status = "okay";
|
};
|
|
&edp_in_vp0 {
|
status = "disabled";
|
};
|
|
&edp_in_vp1 {
|
status = "okay";
|
};
|
|
&gmac0 {
|
phy-mode = "rgmii";
|
clock_in_out = "output";
|
|
snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
|
snps,reset-active-low;
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
snps,reset-delays-us = <0 20000 100000>;
|
|
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
|
assigned-clock-rates = <0>, <125000000>;
|
|
pinctrl-names = "default";
|
pinctrl-0 = <&gmac0_miim
|
&gmac0_tx_bus2
|
&gmac0_rx_bus2
|
&gmac0_rgmii_clk
|
&gmac0_rgmii_bus>;
|
|
tx_delay = <0x3c>;
|
rx_delay = <0x2f>;
|
|
phy-handle = <&rgmii_phy0>;
|
|
status = "okay";
|
|
};
|
|
&gmac1 {
|
phy-mode = "rgmii";
|
clock_in_out = "output";
|
|
snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
|
snps,reset-active-low;
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
snps,reset-delays-us = <0 20000 100000>;
|
|
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
assigned-clock-rates = <0>, <125000000>;
|
|
pinctrl-names = "default";
|
pinctrl-0 = <&gmac1m1_miim
|
&gmac1m1_tx_bus2
|
&gmac1m1_rx_bus2
|
&gmac1m1_rgmii_clk
|
&gmac1m1_rgmii_bus>;
|
|
tx_delay = <0x4f>;
|
rx_delay = <0x26>;
|
|
phy-handle = <&rgmii_phy1>;
|
status = "okay";
|
};
|
|
/*
|
* power-supply should switche to vcc3v3_lcd1_n
|
* when mipi panel is connected to dsi1.
|
*/
|
|
|
&i2c3 {
|
status = "okay";
|
//mac eeprom
|
eeprom@51 {
|
//compatible = "atmel,24c02";
|
compatible = "atmel,24c256";
|
reg = <0x51>;
|
};
|
|
//nk-mcu
|
nkmcu@15 {
|
compatible = "nk_mcu";
|
reg = <0x15>;
|
};
|
};
|
|
&i2c4 {
|
status = "disabled";
|
gc8034: gc8034@37 {
|
compatible = "galaxycore,gc8034";
|
status = "okay";
|
reg = <0x37>;
|
clocks = <&cru CLK_CIF_OUT>;
|
clock-names = "xvclk";
|
pinctrl-names = "default";
|
pinctrl-0 = <&cif_clk>;
|
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
|
pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
|
rockchip,grf = <&grf>;
|
power-domains = <&power RK3568_PD_VI>;
|
rockchip,camera-module-index = <0>;
|
rockchip,camera-module-facing = "back";
|
rockchip,camera-module-name = "RK-CMK-8M-2-v1";
|
rockchip,camera-module-lens-name = "CK8401";
|
port {
|
gc8034_out: endpoint {
|
remote-endpoint = <&mipi_in_ucam1>;
|
data-lanes = <1 2 3 4>;
|
};
|
};
|
};
|
os04a10: os04a10@36 {
|
compatible = "ovti,os04a10";
|
reg = <0x36>;
|
clocks = <&cru CLK_CIF_OUT>;
|
clock-names = "xvclk";
|
power-domains = <&power RK3568_PD_VI>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&cif_clk>;
|
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
|
pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
|
rockchip,camera-module-index = <0>;
|
rockchip,camera-module-facing = "back";
|
rockchip,camera-module-name = "CMK-OT1607-FV1";
|
rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16";
|
port {
|
ucam_out0: endpoint {
|
remote-endpoint = <&mipi_in_ucam0>;
|
data-lanes = <1 2 3 4>;
|
};
|
};
|
};
|
ov5695: ov5695@36 {
|
status = "disabled";
|
compatible = "ovti,ov5695";
|
reg = <0x36>;
|
clocks = <&cru CLK_CIF_OUT>;
|
clock-names = "xvclk";
|
power-domains = <&power RK3568_PD_VI>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&cif_clk>;
|
reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
|
pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
|
rockchip,camera-module-index = <0>;
|
rockchip,camera-module-facing = "back";
|
rockchip,camera-module-name = "TongJu";
|
rockchip,camera-module-lens-name = "CHT842-MD";
|
port {
|
ov5695_out: endpoint {
|
remote-endpoint = <&mipi_in_ucam2>;
|
data-lanes = <1 2>;
|
};
|
};
|
};
|
};
|
|
&mdio0 {
|
rgmii_phy0: phy@0 {
|
compatible = "ethernet-phy-ieee802.3-c22";
|
reg = <0x0>;
|
};
|
};
|
|
&mdio1 {
|
rgmii_phy1: phy@0 {
|
compatible = "ethernet-phy-ieee802.3-c22";
|
reg = <0x0>;
|
};
|
};
|
|
&video_phy0 {
|
status = "okay";
|
};
|
|
&video_phy1 {
|
status = "disabled";
|
};
|
|
&pcie30phy {
|
status = "okay";
|
};
|
|
&pcie2x1 {
|
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
vpcie3v3-supply = <&vcc3v3_pcie>;
|
status = "okay";
|
};
|
|
&pcie3x2 {
|
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
|
vpcie3v3-supply = <&vcc3v3_pcie>;
|
status = "disabled";
|
};
|
|
&pcie3x1 {
|
rockchip,bifurcation;
|
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
|
vpcie3v3-supply = <&vcc3v3_pcie>;
|
status = "okay";
|
};
|
|
&pinctrl {
|
|
headphone {
|
hp_det: hp-det {
|
rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
};
|
};
|
|
wireless-wlan {
|
wifi_host_wake_irq: wifi-host-wake-irq {
|
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
|
};
|
};
|
|
nk_io_init{
|
nk_io_gpio: nk-io-gpio{
|
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
|
<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
|
<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
|
<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
|
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
|
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
|
<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
|
<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
|
<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
|
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
|
<0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //12
|
<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //13
|
<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, //16
|
<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, //17
|
<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
|
<2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
|
<2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
|
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
|
<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
};
|
};
|
};
|
|
&rk809_sound {
|
hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
|
};
|
|
&rkisp {
|
status = "disabled";
|
};
|
|
&rkisp_mmu {
|
status = "disabled";
|
};
|
|
&rkisp_vir0 {
|
status = "disabled";
|
|
port {
|
#address-cells = <1>;
|
#size-cells = <0>;
|
|
isp0_in: endpoint@0 {
|
reg = <0>;
|
remote-endpoint = <&csidphy_out>;
|
};
|
};
|
};
|
|
&route_dsi0 {
|
status = "disabled";
|
connect = <&vp1_out_dsi0>;
|
};
|
|
|
|
&route_edp {
|
status = "disabled";
|
connect = <&vp1_out_edp>;
|
};
|
|
&sata2 {
|
status = "okay";
|
};
|
|
&sdmmc2 {
|
max-frequency = <150000000>;
|
supports-sdio;
|
bus-width = <4>;
|
disable-wp;
|
cap-sd-highspeed;
|
cap-sdio-irq;
|
keep-power-in-suspend;
|
mmc-pwrseq = <&sdio_pwrseq>;
|
non-removable;
|
pinctrl-names = "default";
|
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
|
sd-uhs-sdr104;
|
status = "okay";
|
};
|
|
&spdif_8ch {
|
status = "okay";
|
pinctrl-names = "default";
|
pinctrl-0 = <&spdifm1_tx>;
|
};
|
|
&uart8 {
|
status = "disabled";
|
pinctrl-names = "default";
|
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
|
};
|
|
&vcc3v3_lcd0_n {
|
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
|
enable-active-high;
|
};
|
|
&vcc3v3_lcd1_n {
|
gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
|
enable-active-high;
|
};
|
|
&wireless_wlan {
|
pinctrl-names = "default";
|
pinctrl-0 = <&wifi_host_wake_irq>;
|
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
|
};
|
|
&wireless_bluetooth {
|
compatible = "bluetooth-platdata";
|
status = "disabled";
|
};
|
|
&uart0 {
|
status = "disabled";
|
};
|
|
&uart1 {
|
pinctrl-names = "default";
|
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
status = "disabled";
|
};
|
|
&uart3 {
|
status = "okay";
|
pinctrl-0 = <&uart3m1_xfer>;
|
};
|
|
&uart4 {
|
status = "okay";
|
pinctrl-0 = <&uart4m1_xfer>;
|
};
|
|
&uart5 {
|
status = "okay";
|
pinctrl-0 = <&uart5m1_xfer>;
|
};
|
|
&uart7 {
|
status = "disabled";
|
pinctrl-0 = <&uart7m1_xfer>;
|
};
|
|
&uart9 {
|
status = "disabled";
|
pinctrl-0 = <&uart9m1_xfer>;
|
};
|
