/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Rockchip General Register Files definitions
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*
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* Copyright (c) 2018, Collabora Ltd.
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* Author: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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*/
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#ifndef __SOC_RK3399_GRF_H
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#define __SOC_RK3399_GRF_H
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/* PMU GRF Registers */
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#define RK3399_PMUGRF_OS_REG2 0x308
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#define RK3399_PMUGRF_DDRTYPE_SHIFT 13
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#define RK3399_PMUGRF_DDRTYPE_MASK 7
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#define RK3399_PMUGRF_DDRTYPE_DDR3 3
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#define RK3399_PMUGRF_DDRTYPE_LPDDR2 5
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#define RK3399_PMUGRF_DDRTYPE_LPDDR3 6
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#define RK3399_PMUGRF_DDRTYPE_LPDDR4 7
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#endif
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