// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Remote processor machine-specific module for DA8XX
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/platform_device.h>
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#include <linux/remoteproc.h>
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#include "remoteproc_internal.h"
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static char *da8xx_fw_name;
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module_param(da8xx_fw_name, charp, 0444);
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MODULE_PARM_DESC(da8xx_fw_name,
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"Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
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/*
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* OMAP-L138 Technical References:
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* http://www.ti.com/product/omap-l138
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*/
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#define SYSCFG_CHIPSIG0 BIT(0)
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#define SYSCFG_CHIPSIG1 BIT(1)
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#define SYSCFG_CHIPSIG2 BIT(2)
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#define SYSCFG_CHIPSIG3 BIT(3)
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#define SYSCFG_CHIPSIG4 BIT(4)
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#define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
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/**
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* struct da8xx_rproc_mem - internal memory structure
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* @cpu_addr: MPU virtual address of the memory region
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* @bus_addr: Bus address used to access the memory region
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* @dev_addr: Device address of the memory region from DSP view
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* @size: Size of the memory region
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*/
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struct da8xx_rproc_mem {
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void __iomem *cpu_addr;
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phys_addr_t bus_addr;
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u32 dev_addr;
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size_t size;
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};
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/**
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* struct da8xx_rproc - da8xx remote processor instance state
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* @rproc: rproc handle
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* @mem: internal memory regions data
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* @num_mems: number of internal memory regions
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* @dsp_clk: placeholder for platform's DSP clk
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* @ack_fxn: chip-specific ack function for ack'ing irq
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* @irq_data: ack_fxn function parameter
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* @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
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* @bootreg: virt ptr to DSP boot address register (HOST1CFG)
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* @irq: irq # used by this instance
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*/
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struct da8xx_rproc {
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struct rproc *rproc;
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struct da8xx_rproc_mem *mem;
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int num_mems;
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struct clk *dsp_clk;
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struct reset_control *dsp_reset;
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void (*ack_fxn)(struct irq_data *data);
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struct irq_data *irq_data;
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void __iomem *chipsig;
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void __iomem *bootreg;
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int irq;
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};
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/**
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* handle_event() - inbound virtqueue message workqueue function
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*
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* This function is registered as a kernel thread and is scheduled by the
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* kernel handler.
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*/
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static irqreturn_t handle_event(int irq, void *p)
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{
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struct rproc *rproc = (struct rproc *)p;
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/* Process incoming buffers on all our vrings */
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rproc_vq_interrupt(rproc, 0);
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rproc_vq_interrupt(rproc, 1);
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return IRQ_HANDLED;
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}
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/**
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* da8xx_rproc_callback() - inbound virtqueue message handler
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*
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* This handler is invoked directly by the kernel whenever the remote
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* core (DSP) has modified the state of a virtqueue. There is no
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* "payload" message indicating the virtqueue index as is the case with
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* mailbox-based implementations on OMAP4. As such, this handler "polls"
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* each known virtqueue index for every invocation.
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*/
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static irqreturn_t da8xx_rproc_callback(int irq, void *p)
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{
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struct rproc *rproc = (struct rproc *)p;
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struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
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u32 chipsig;
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chipsig = readl(drproc->chipsig);
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if (chipsig & SYSCFG_CHIPSIG0) {
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/* Clear interrupt level source */
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writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
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/*
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* ACK intr to AINTC.
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*
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* It has already been ack'ed by the kernel before calling
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* this function, but since the ARM<->DSP interrupts in the
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* CHIPSIG register are "level" instead of "pulse" variety,
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* we need to ack it after taking down the level else we'll
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* be called again immediately after returning.
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*/
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drproc->ack_fxn(drproc->irq_data);
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return IRQ_WAKE_THREAD;
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}
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return IRQ_HANDLED;
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}
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static int da8xx_rproc_start(struct rproc *rproc)
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{
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struct device *dev = rproc->dev.parent;
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struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
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struct clk *dsp_clk = drproc->dsp_clk;
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struct reset_control *dsp_reset = drproc->dsp_reset;
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int ret;
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/* hw requires the start (boot) address be on 1KB boundary */
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if (rproc->bootaddr & 0x3ff) {
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dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
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return -EINVAL;
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}
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writel(rproc->bootaddr, drproc->bootreg);
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ret = clk_prepare_enable(dsp_clk);
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if (ret) {
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dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
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return ret;
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}
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ret = reset_control_deassert(dsp_reset);
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if (ret) {
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dev_err(dev, "reset_control_deassert() failed: %d\n", ret);
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clk_disable_unprepare(dsp_clk);
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return ret;
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}
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return 0;
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}
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static int da8xx_rproc_stop(struct rproc *rproc)
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{
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struct da8xx_rproc *drproc = rproc->priv;
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struct device *dev = rproc->dev.parent;
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int ret;
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ret = reset_control_assert(drproc->dsp_reset);
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if (ret) {
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dev_err(dev, "reset_control_assert() failed: %d\n", ret);
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return ret;
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}
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clk_disable_unprepare(drproc->dsp_clk);
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return 0;
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}
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/* kick a virtqueue */
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static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
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{
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struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
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/* Interrupt remote proc */
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writel(SYSCFG_CHIPSIG2, drproc->chipsig);
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}
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static const struct rproc_ops da8xx_rproc_ops = {
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.start = da8xx_rproc_start,
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.stop = da8xx_rproc_stop,
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.kick = da8xx_rproc_kick,
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};
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static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
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struct da8xx_rproc *drproc)
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{
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static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
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int num_mems = ARRAY_SIZE(mem_names);
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struct device *dev = &pdev->dev;
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struct resource *res;
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int i;
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drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
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GFP_KERNEL);
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if (!drproc->mem)
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return -ENOMEM;
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for (i = 0; i < num_mems; i++) {
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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mem_names[i]);
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drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
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if (IS_ERR(drproc->mem[i].cpu_addr)) {
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dev_err(dev, "failed to parse and map %s memory\n",
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mem_names[i]);
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return PTR_ERR(drproc->mem[i].cpu_addr);
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}
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drproc->mem[i].bus_addr = res->start;
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drproc->mem[i].dev_addr =
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res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
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drproc->mem[i].size = resource_size(res);
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dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n",
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mem_names[i], &drproc->mem[i].bus_addr,
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drproc->mem[i].size, drproc->mem[i].cpu_addr,
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drproc->mem[i].dev_addr);
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}
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drproc->num_mems = num_mems;
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return 0;
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}
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static int da8xx_rproc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct da8xx_rproc *drproc;
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struct rproc *rproc;
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struct irq_data *irq_data;
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struct resource *bootreg_res;
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struct resource *chipsig_res;
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struct clk *dsp_clk;
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struct reset_control *dsp_reset;
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void __iomem *chipsig;
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void __iomem *bootreg;
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int irq;
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int ret;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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irq_data = irq_get_irq_data(irq);
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if (!irq_data) {
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dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
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return -EINVAL;
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}
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bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"host1cfg");
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bootreg = devm_ioremap_resource(dev, bootreg_res);
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if (IS_ERR(bootreg))
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return PTR_ERR(bootreg);
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chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"chipsig");
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chipsig = devm_ioremap_resource(dev, chipsig_res);
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if (IS_ERR(chipsig))
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return PTR_ERR(chipsig);
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dsp_clk = devm_clk_get(dev, NULL);
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if (IS_ERR(dsp_clk)) {
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dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
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return PTR_ERR(dsp_clk);
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}
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dsp_reset = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(dsp_reset)) {
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if (PTR_ERR(dsp_reset) != -EPROBE_DEFER)
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dev_err(dev, "unable to get reset control: %ld\n",
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PTR_ERR(dsp_reset));
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return PTR_ERR(dsp_reset);
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}
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if (dev->of_node) {
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ret = of_reserved_mem_device_init(dev);
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if (ret) {
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dev_err(dev, "device does not have specific CMA pool: %d\n",
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ret);
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return ret;
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}
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}
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rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
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sizeof(*drproc));
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if (!rproc) {
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ret = -ENOMEM;
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goto free_mem;
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}
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/* error recovery is not supported at present */
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rproc->recovery_disabled = true;
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drproc = rproc->priv;
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drproc->rproc = rproc;
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drproc->dsp_clk = dsp_clk;
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drproc->dsp_reset = dsp_reset;
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rproc->has_iommu = false;
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ret = da8xx_rproc_get_internal_memories(pdev, drproc);
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if (ret)
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goto free_rproc;
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platform_set_drvdata(pdev, rproc);
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/* everything the ISR needs is now setup, so hook it up */
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ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
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handle_event, 0, "da8xx-remoteproc",
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rproc);
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if (ret) {
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dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
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goto free_rproc;
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}
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/*
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* rproc_add() can end up enabling the DSP's clk with the DSP
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* *not* in reset, but da8xx_rproc_start() needs the DSP to be
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* held in reset at the time it is called.
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*/
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ret = reset_control_assert(dsp_reset);
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if (ret)
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goto free_rproc;
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drproc->chipsig = chipsig;
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drproc->bootreg = bootreg;
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drproc->ack_fxn = irq_data->chip->irq_ack;
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drproc->irq_data = irq_data;
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drproc->irq = irq;
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ret = rproc_add(rproc);
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if (ret) {
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dev_err(dev, "rproc_add failed: %d\n", ret);
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goto free_rproc;
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}
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return 0;
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free_rproc:
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rproc_free(rproc);
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free_mem:
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if (dev->of_node)
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of_reserved_mem_device_release(dev);
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return ret;
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}
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static int da8xx_rproc_remove(struct platform_device *pdev)
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{
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struct rproc *rproc = platform_get_drvdata(pdev);
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struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
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struct device *dev = &pdev->dev;
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/*
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* The devm subsystem might end up releasing things before
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* freeing the irq, thus allowing an interrupt to sneak in while
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* the device is being removed. This should prevent that.
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*/
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disable_irq(drproc->irq);
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rproc_del(rproc);
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rproc_free(rproc);
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if (dev->of_node)
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of_reserved_mem_device_release(dev);
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return 0;
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}
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static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
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{ .compatible = "ti,da850-dsp", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
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static struct platform_driver da8xx_rproc_driver = {
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.probe = da8xx_rproc_probe,
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.remove = da8xx_rproc_remove,
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.driver = {
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.name = "davinci-rproc",
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.of_match_table = of_match_ptr(davinci_rproc_of_match),
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},
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};
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module_platform_driver(da8xx_rproc_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("DA8XX Remote Processor control driver");
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