// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Copyright(c) 2018-2019 Realtek Corporation
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*/
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#include "main.h"
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#include "sec.h"
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#include "reg.h"
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int rtw_sec_get_free_cam(struct rtw_sec_desc *sec)
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{
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/* if default key search is enabled, the first 4 cam entries
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* are used to direct map to group key with its key->key_idx, so
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* driver should use cam entries after 4 to install pairwise key
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*/
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if (sec->default_key_search)
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return find_next_zero_bit(sec->cam_map, RTW_MAX_SEC_CAM_NUM,
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RTW_SEC_DEFAULT_KEY_NUM);
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return find_first_zero_bit(sec->cam_map, RTW_MAX_SEC_CAM_NUM);
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}
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void rtw_sec_write_cam(struct rtw_dev *rtwdev,
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struct rtw_sec_desc *sec,
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struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key,
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u8 hw_key_type, u8 hw_key_idx)
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{
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struct rtw_cam_entry *cam = &sec->cam_table[hw_key_idx];
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u32 write_cmd;
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u32 command;
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u32 content;
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u32 addr;
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int i, j;
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set_bit(hw_key_idx, sec->cam_map);
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cam->valid = true;
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cam->group = !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
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cam->hw_key_type = hw_key_type;
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cam->key = key;
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if (sta)
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ether_addr_copy(cam->addr, sta->addr);
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else
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eth_broadcast_addr(cam->addr);
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write_cmd = RTW_SEC_CMD_WRITE_ENABLE | RTW_SEC_CMD_POLLING;
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addr = hw_key_idx << RTW_SEC_CAM_ENTRY_SHIFT;
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for (i = 7; i >= 0; i--) {
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switch (i) {
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case 0:
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content = ((key->keyidx & 0x3)) |
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((hw_key_type & 0x7) << 2) |
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(cam->group << 6) |
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(cam->valid << 15) |
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(cam->addr[0] << 16) |
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(cam->addr[1] << 24);
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break;
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case 1:
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content = (cam->addr[2]) |
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(cam->addr[3] << 8) |
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(cam->addr[4] << 16) |
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(cam->addr[5] << 24);
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break;
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case 6:
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case 7:
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content = 0;
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break;
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default:
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j = (i - 2) << 2;
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content = (key->key[j]) |
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(key->key[j + 1] << 8) |
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(key->key[j + 2] << 16) |
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(key->key[j + 3] << 24);
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break;
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}
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command = write_cmd | (addr + i);
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rtw_write32(rtwdev, RTW_SEC_WRITE_REG, content);
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rtw_write32(rtwdev, RTW_SEC_CMD_REG, command);
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}
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}
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void rtw_sec_clear_cam(struct rtw_dev *rtwdev,
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struct rtw_sec_desc *sec,
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u8 hw_key_idx)
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{
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struct rtw_cam_entry *cam = &sec->cam_table[hw_key_idx];
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u32 write_cmd;
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u32 command;
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u32 addr;
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clear_bit(hw_key_idx, sec->cam_map);
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cam->valid = false;
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cam->key = NULL;
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eth_zero_addr(cam->addr);
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write_cmd = RTW_SEC_CMD_WRITE_ENABLE | RTW_SEC_CMD_POLLING;
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addr = hw_key_idx << RTW_SEC_CAM_ENTRY_SHIFT;
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command = write_cmd | addr;
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rtw_write32(rtwdev, RTW_SEC_WRITE_REG, 0);
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rtw_write32(rtwdev, RTW_SEC_CMD_REG, command);
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}
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u8 rtw_sec_cam_pg_backup(struct rtw_dev *rtwdev, u8 *used_cam)
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{
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struct rtw_sec_desc *sec = &rtwdev->sec;
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u8 offset = 0;
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u8 count, n;
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if (!used_cam)
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return 0;
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for (count = 0; count < MAX_PG_CAM_BACKUP_NUM; count++) {
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n = find_next_bit(sec->cam_map, RTW_MAX_SEC_CAM_NUM, offset);
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if (n == RTW_MAX_SEC_CAM_NUM)
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break;
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used_cam[count] = n;
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offset = n + 1;
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}
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return count;
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}
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void rtw_sec_enable_sec_engine(struct rtw_dev *rtwdev)
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{
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struct rtw_sec_desc *sec = &rtwdev->sec;
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u16 ctrl_reg;
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u16 sec_config;
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/* default use default key search for now */
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sec->default_key_search = true;
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ctrl_reg = rtw_read16(rtwdev, REG_CR);
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ctrl_reg |= RTW_SEC_ENGINE_EN;
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rtw_write16(rtwdev, REG_CR, ctrl_reg);
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sec_config = rtw_read16(rtwdev, RTW_SEC_CONFIG);
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sec_config |= RTW_SEC_TX_DEC_EN | RTW_SEC_RX_DEC_EN;
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if (sec->default_key_search)
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sec_config |= RTW_SEC_TX_UNI_USE_DK | RTW_SEC_RX_UNI_USE_DK |
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RTW_SEC_TX_BC_USE_DK | RTW_SEC_RX_BC_USE_DK;
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rtw_write16(rtwdev, RTW_SEC_CONFIG, sec_config);
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}
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