/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
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*/
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/*
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* Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
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*
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* The Weather Channel (TM) funded Tungsten Graphics to develop the
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* initial release of the Radeon 8500 driver under the XFree86 license.
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* This notice must be preserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* Eric Anholt <anholt@FreeBSD.org>
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*/
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#include "mga_drv.h"
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u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
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{
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const drm_mga_private_t *const dev_priv =
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(drm_mga_private_t *) dev->dev_private;
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if (pipe != 0)
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return 0;
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return atomic_read(&dev_priv->vbl_received);
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}
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irqreturn_t mga_driver_irq_handler(int irq, void *arg)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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int status;
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int handled = 0;
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status = MGA_READ(MGA_STATUS);
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/* VBLANK interrupt */
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if (status & MGA_VLINEPEN) {
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MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
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atomic_inc(&dev_priv->vbl_received);
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drm_handle_vblank(dev, 0);
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handled = 1;
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}
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/* SOFTRAP interrupt */
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if (status & MGA_SOFTRAPEN) {
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const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
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const u32 prim_end = MGA_READ(MGA_PRIMEND);
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MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
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/* In addition to clearing the interrupt-pending bit, we
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* have to write to MGA_PRIMEND to re-start the DMA operation.
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*/
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if ((prim_start & ~0x03) != (prim_end & ~0x03))
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MGA_WRITE(MGA_PRIMEND, prim_end);
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atomic_inc(&dev_priv->last_fence_retired);
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wake_up(&dev_priv->fence_queue);
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handled = 1;
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}
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if (handled)
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return IRQ_HANDLED;
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return IRQ_NONE;
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}
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int mga_enable_vblank(struct drm_device *dev, unsigned int pipe)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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if (pipe != 0) {
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DRM_ERROR("tried to enable vblank on non-existent crtc %u\n",
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pipe);
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return 0;
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}
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MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
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return 0;
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}
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void mga_disable_vblank(struct drm_device *dev, unsigned int pipe)
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{
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if (pipe != 0) {
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DRM_ERROR("tried to disable vblank on non-existent crtc %u\n",
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pipe);
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}
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/* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
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* a nice hardware counter that tracks the number of refreshes when
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* the interrupt is disabled, and the kernel doesn't know the refresh
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* rate to calculate an estimate.
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*/
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/* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
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}
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void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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unsigned int cur_fence;
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/* Assume that the user has missed the current sequence number
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* by about a day rather than she wants to wait for years
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* using fences.
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*/
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wait_event_timeout(dev_priv->fence_queue,
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(((cur_fence = atomic_read(&dev_priv->last_fence_retired))
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- *sequence) <= (1 << 23)),
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msecs_to_jiffies(3000));
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*sequence = cur_fence;
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}
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void mga_driver_irq_preinstall(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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/* Disable *all* interrupts */
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MGA_WRITE(MGA_IEN, 0);
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/* Clear bits if they're already high */
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MGA_WRITE(MGA_ICLEAR, ~0);
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}
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int mga_driver_irq_postinstall(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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init_waitqueue_head(&dev_priv->fence_queue);
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/* Turn on soft trap interrupt. Vertical blank interrupts are enabled
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* in mga_enable_vblank.
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*/
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MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
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return 0;
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}
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void mga_driver_irq_uninstall(struct drm_device *dev)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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if (!dev_priv)
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return;
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/* Disable *all* interrupts */
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MGA_WRITE(MGA_IEN, 0);
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dev->irq_enabled = false;
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}
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