/*
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*
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* (C) COPYRIGHT 2013-2017 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* A copy of the licence is included with the program, and can also be obtained
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* from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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/**
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* @file mali_kbase_config_defaults.h
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*
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* Default values for configuration settings
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*
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*/
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#ifndef _KBASE_CONFIG_DEFAULTS_H_
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#define _KBASE_CONFIG_DEFAULTS_H_
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/* Include mandatory definitions per platform */
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#include <mali_kbase_config_platform.h>
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/**
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* Boolean indicating whether the driver is configured to be secure at
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* a potential loss of performance.
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*
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* This currently affects only r0p0-15dev0 HW and earlier.
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*
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* On r0p0-15dev0 HW and earlier, there are tradeoffs between security and
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* performance:
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*
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* - When this is set to true, the driver remains fully secure,
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* but potentially loses performance compared with setting this to
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* false.
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* - When set to false, the driver is open to certain security
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* attacks.
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*
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* From r0p0-00rel0 and onwards, there is no security loss by setting
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* this to false, and no performance loss by setting it to
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* true.
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*/
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#define DEFAULT_SECURE_BUT_LOSS_OF_PERFORMANCE false
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enum {
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/**
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* Use unrestricted Address ID width on the AXI bus.
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*/
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KBASE_AID_32 = 0x0,
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/**
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* Restrict GPU to a half of maximum Address ID count.
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* This will reduce performance, but reduce bus load due to GPU.
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*/
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KBASE_AID_16 = 0x3,
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/**
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* Restrict GPU to a quarter of maximum Address ID count.
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* This will reduce performance, but reduce bus load due to GPU.
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*/
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KBASE_AID_8 = 0x2,
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/**
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* Restrict GPU to an eighth of maximum Address ID count.
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* This will reduce performance, but reduce bus load due to GPU.
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*/
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KBASE_AID_4 = 0x1
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};
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/**
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* Default setting for read Address ID limiting on AXI bus.
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*
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* Attached value: u32 register value
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* KBASE_AID_32 - use the full 32 IDs (5 ID bits)
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* KBASE_AID_16 - use 16 IDs (4 ID bits)
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* KBASE_AID_8 - use 8 IDs (3 ID bits)
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* KBASE_AID_4 - use 4 IDs (2 ID bits)
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* Default value: KBASE_AID_32 (no limit). Note hardware implementation
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* may limit to a lower value.
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*/
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#define DEFAULT_ARID_LIMIT KBASE_AID_32
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/**
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* Default setting for write Address ID limiting on AXI.
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*
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* Attached value: u32 register value
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* KBASE_AID_32 - use the full 32 IDs (5 ID bits)
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* KBASE_AID_16 - use 16 IDs (4 ID bits)
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* KBASE_AID_8 - use 8 IDs (3 ID bits)
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* KBASE_AID_4 - use 4 IDs (2 ID bits)
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* Default value: KBASE_AID_32 (no limit). Note hardware implementation
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* may limit to a lower value.
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*/
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#define DEFAULT_AWID_LIMIT KBASE_AID_32
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/**
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* Default UMP device mapping. A UMP_DEVICE_<device>_SHIFT value which
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* defines which UMP device this GPU should be mapped to.
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*/
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#define DEFAULT_UMP_GPU_DEVICE_SHIFT UMP_DEVICE_Z_SHIFT
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/*
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* Default period for DVFS sampling
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*/
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// #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */
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#define DEFAULT_PM_DVFS_PERIOD 20 /* 20 ms */
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/*
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* Power Management poweroff tick granuality. This is in nanoseconds to
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* allow HR timer support.
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*
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* On each scheduling tick, the power manager core may decide to:
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* -# Power off one or more shader cores
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* -# Power off the entire GPU
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*/
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#define DEFAULT_PM_GPU_POWEROFF_TICK_NS (400000) /* 400us */
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/*
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* Power Manager number of ticks before shader cores are powered off
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*/
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#define DEFAULT_PM_POWEROFF_TICK_SHADER (2) /* 400-800us */
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/*
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* Power Manager number of ticks before GPU is powered off
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*/
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#define DEFAULT_PM_POWEROFF_TICK_GPU (2) /* 400-800us */
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/*
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* Default scheduling tick granuality
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*/
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#define DEFAULT_JS_SCHEDULING_PERIOD_NS (100000000u) /* 100ms */
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/*
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* Default minimum number of scheduling ticks before jobs are soft-stopped.
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*
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* This defines the time-slice for a job (which may be different from that of a
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* context)
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*/
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#define DEFAULT_JS_SOFT_STOP_TICKS (1) /* 100ms-200ms */
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/*
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* Default minimum number of scheduling ticks before CL jobs are soft-stopped.
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*/
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#define DEFAULT_JS_SOFT_STOP_TICKS_CL (1) /* 100ms-200ms */
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/*
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* Default minimum number of scheduling ticks before jobs are hard-stopped
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*/
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#define DEFAULT_JS_HARD_STOP_TICKS_SS (50) /* 5s */
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#define DEFAULT_JS_HARD_STOP_TICKS_SS_8408 (300) /* 30s */
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/*
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* Default minimum number of scheduling ticks before CL jobs are hard-stopped.
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*/
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#define DEFAULT_JS_HARD_STOP_TICKS_CL (50) /* 5s */
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/*
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* Default minimum number of scheduling ticks before jobs are hard-stopped
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* during dumping
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*/
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#define DEFAULT_JS_HARD_STOP_TICKS_DUMPING (15000) /* 1500s */
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/*
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* Default timeout for some software jobs, after which the software event wait
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* jobs will be cancelled.
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*/
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#define DEFAULT_JS_SOFT_JOB_TIMEOUT (3000) /* 3s */
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/*
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* Default minimum number of scheduling ticks before the GPU is reset to clear a
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* "stuck" job
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*/
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#define DEFAULT_JS_RESET_TICKS_SS (55) /* 5.5s */
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#define DEFAULT_JS_RESET_TICKS_SS_8408 (450) /* 45s */
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/*
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* Default minimum number of scheduling ticks before the GPU is reset to clear a
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* "stuck" CL job.
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*/
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#define DEFAULT_JS_RESET_TICKS_CL (55) /* 5.5s */
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/*
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* Default minimum number of scheduling ticks before the GPU is reset to clear a
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* "stuck" job during dumping.
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*/
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#define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */
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/*
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* Default number of milliseconds given for other jobs on the GPU to be
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* soft-stopped when the GPU needs to be reset.
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*/
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#define DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */
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/*
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* Default timeslice that a context is scheduled in for, in nanoseconds.
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*
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* When a context has used up this amount of time across its jobs, it is
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* scheduled out to let another run.
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*
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* @note the resolution is nanoseconds (ns) here, because that's the format
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* often used by the OS.
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*/
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#define DEFAULT_JS_CTX_TIMESLICE_NS (50000000) /* 50ms */
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/*
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* Perform GPU power down using only platform specific code, skipping DDK power
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* management.
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*
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* If this is non-zero then kbase will avoid powering down shader cores, the
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* tiler, and the L2 cache, instead just powering down the entire GPU through
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* platform specific code. This may be required for certain platform
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* integrations.
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*
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* Note that as this prevents kbase from powering down shader cores, this limits
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* the available power policies to coarse_demand and always_on.
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*/
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#define PLATFORM_POWER_DOWN_ONLY (1)
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#endif /* _KBASE_CONFIG_DEFAULTS_H_ */
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