// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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* Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
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* Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
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*
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* Adjustable divider clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/log2.h>
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/*
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* DOC: basic adjustable divider clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* enable - clk_enable only ensures that parents are enabled
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* rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor)
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* parent - fixed parent. No clk_set_parent support
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*/
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static inline u32 clk_div_readl(struct clk_divider *divider)
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{
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if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
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return ioread32be(divider->reg);
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return readl(divider->reg);
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}
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static inline void clk_div_writel(struct clk_divider *divider, u32 val)
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{
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if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
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iowrite32be(val, divider->reg);
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else
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writel(val, divider->reg);
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}
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static unsigned int _get_table_maxdiv(const struct clk_div_table *table,
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u8 width)
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{
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unsigned int maxdiv = 0, mask = clk_div_mask(width);
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const struct clk_div_table *clkt;
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for (clkt = table; clkt->div; clkt++)
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if (clkt->div > maxdiv && clkt->val <= mask)
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maxdiv = clkt->div;
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return maxdiv;
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}
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static unsigned int _get_table_mindiv(const struct clk_div_table *table)
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{
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unsigned int mindiv = UINT_MAX;
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const struct clk_div_table *clkt;
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for (clkt = table; clkt->div; clkt++)
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if (clkt->div < mindiv)
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mindiv = clkt->div;
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return mindiv;
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}
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static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
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unsigned long flags)
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{
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if (flags & CLK_DIVIDER_ONE_BASED)
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return clk_div_mask(width);
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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return 1 << clk_div_mask(width);
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if (table)
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return _get_table_maxdiv(table, width);
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return clk_div_mask(width) + 1;
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}
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static unsigned int _get_table_div(const struct clk_div_table *table,
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unsigned int val)
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{
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const struct clk_div_table *clkt;
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for (clkt = table; clkt->div; clkt++)
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if (clkt->val == val)
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return clkt->div;
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return 0;
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}
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static unsigned int _get_div(const struct clk_div_table *table,
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unsigned int val, unsigned long flags, u8 width)
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{
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if (flags & CLK_DIVIDER_ONE_BASED)
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return val;
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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return 1 << val;
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if (flags & CLK_DIVIDER_MAX_AT_ZERO)
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return val ? val : clk_div_mask(width) + 1;
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if (table)
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return _get_table_div(table, val);
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return val + 1;
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}
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static unsigned int _get_table_val(const struct clk_div_table *table,
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unsigned int div)
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{
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const struct clk_div_table *clkt;
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for (clkt = table; clkt->div; clkt++)
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if (clkt->div == div)
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return clkt->val;
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return 0;
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}
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static unsigned int _get_val(const struct clk_div_table *table,
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unsigned int div, unsigned long flags, u8 width)
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{
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if (flags & CLK_DIVIDER_ONE_BASED)
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return div;
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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return __ffs(div);
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if (flags & CLK_DIVIDER_MAX_AT_ZERO)
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return (div == clk_div_mask(width) + 1) ? 0 : div;
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if (table)
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return _get_table_val(table, div);
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return div - 1;
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}
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unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
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unsigned int val,
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const struct clk_div_table *table,
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unsigned long flags, unsigned long width)
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{
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unsigned int div;
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div = _get_div(table, val, flags, width);
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if (!div) {
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WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
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"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
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clk_hw_get_name(hw));
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return parent_rate;
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}
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return DIV_ROUND_UP_ULL((u64)parent_rate, div);
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}
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EXPORT_SYMBOL_GPL(divider_recalc_rate);
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static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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unsigned int val;
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val = clk_div_readl(divider) >> divider->shift;
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val &= clk_div_mask(divider->width);
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return divider_recalc_rate(hw, parent_rate, val, divider->table,
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divider->flags, divider->width);
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}
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static bool _is_valid_table_div(const struct clk_div_table *table,
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unsigned int div)
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{
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const struct clk_div_table *clkt;
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for (clkt = table; clkt->div; clkt++)
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if (clkt->div == div)
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return true;
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return false;
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}
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static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
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unsigned long flags)
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{
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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return is_power_of_2(div);
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if (table)
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return _is_valid_table_div(table, div);
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return true;
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}
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static int _round_up_table(const struct clk_div_table *table, int div)
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{
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const struct clk_div_table *clkt;
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int up = INT_MAX;
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for (clkt = table; clkt->div; clkt++) {
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if (clkt->div == div)
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return clkt->div;
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else if (clkt->div < div)
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continue;
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if ((clkt->div - div) < (up - div))
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up = clkt->div;
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}
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return up;
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}
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static int _round_down_table(const struct clk_div_table *table, int div)
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{
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const struct clk_div_table *clkt;
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int down = _get_table_mindiv(table);
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for (clkt = table; clkt->div; clkt++) {
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if (clkt->div == div)
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return clkt->div;
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else if (clkt->div > div)
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continue;
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if ((div - clkt->div) < (div - down))
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down = clkt->div;
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}
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return down;
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}
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static int _div_round_up(const struct clk_div_table *table,
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unsigned long parent_rate, unsigned long rate,
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unsigned long flags)
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{
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int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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div = __roundup_pow_of_two(div);
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if (table)
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div = _round_up_table(table, div);
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return div;
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}
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static int _div_round_closest(const struct clk_div_table *table,
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unsigned long parent_rate, unsigned long rate,
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unsigned long flags)
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{
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int up, down;
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unsigned long up_rate, down_rate;
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up = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
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down = parent_rate / rate;
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if (flags & CLK_DIVIDER_POWER_OF_TWO) {
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up = __roundup_pow_of_two(up);
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down = __rounddown_pow_of_two(down);
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} else if (table) {
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up = _round_up_table(table, up);
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down = _round_down_table(table, down);
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}
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up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up);
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down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down);
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return (rate - up_rate) <= (down_rate - rate) ? up : down;
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}
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static int _div_round(const struct clk_div_table *table,
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unsigned long parent_rate, unsigned long rate,
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unsigned long flags)
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{
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if (flags & CLK_DIVIDER_ROUND_CLOSEST)
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return _div_round_closest(table, parent_rate, rate, flags);
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return _div_round_up(table, parent_rate, rate, flags);
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}
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static bool _is_best_div(unsigned long rate, unsigned long now,
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unsigned long best, unsigned long flags)
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{
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if (flags & CLK_DIVIDER_ROUND_CLOSEST)
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return abs(rate - now) < abs(rate - best);
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return now <= rate && now > best;
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}
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static int _next_div(const struct clk_div_table *table, int div,
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unsigned long flags)
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{
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div++;
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if (flags & CLK_DIVIDER_POWER_OF_TWO)
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return __roundup_pow_of_two(div);
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if (table)
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return _round_up_table(table, div);
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return div;
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}
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static int clk_divider_bestdiv(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long rate,
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unsigned long *best_parent_rate,
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const struct clk_div_table *table, u8 width,
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unsigned long flags)
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{
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int i, bestdiv = 0;
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unsigned long parent_rate, best = 0, now, maxdiv;
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unsigned long parent_rate_saved = *best_parent_rate;
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if (!rate)
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rate = 1;
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maxdiv = _get_maxdiv(table, width, flags);
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if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
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parent_rate = *best_parent_rate;
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bestdiv = _div_round(table, parent_rate, rate, flags);
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bestdiv = bestdiv == 0 ? 1 : bestdiv;
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bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
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return bestdiv;
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}
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/*
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* The maximum divider we can use without overflowing
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* unsigned long in rate * i below
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*/
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maxdiv = min(ULONG_MAX / rate, maxdiv);
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for (i = _next_div(table, 0, flags); i <= maxdiv;
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i = _next_div(table, i, flags)) {
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if (rate * i == parent_rate_saved) {
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/*
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* It's the most ideal case if the requested rate can be
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* divided from parent clock without needing to change
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* parent rate, so return the divider immediately.
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*/
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*best_parent_rate = parent_rate_saved;
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return i;
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}
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parent_rate = clk_hw_round_rate(parent, rate * i);
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now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
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if (_is_best_div(rate, now, best, flags)) {
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bestdiv = i;
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best = now;
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*best_parent_rate = parent_rate;
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}
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}
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if (!bestdiv) {
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bestdiv = _get_maxdiv(table, width, flags);
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*best_parent_rate = clk_hw_round_rate(parent, 1);
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}
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return bestdiv;
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}
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long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long rate, unsigned long *prate,
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const struct clk_div_table *table,
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u8 width, unsigned long flags)
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{
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int div;
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div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags);
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return DIV_ROUND_UP_ULL((u64)*prate, div);
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}
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EXPORT_SYMBOL_GPL(divider_round_rate_parent);
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long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
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unsigned long rate, unsigned long *prate,
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const struct clk_div_table *table, u8 width,
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unsigned long flags, unsigned int val)
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{
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int div;
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div = _get_div(table, val, flags, width);
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/* Even a read-only clock can propagate a rate change */
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if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
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if (!parent)
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return -EINVAL;
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*prate = clk_hw_round_rate(parent, rate * div);
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}
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return DIV_ROUND_UP_ULL((u64)*prate, div);
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}
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EXPORT_SYMBOL_GPL(divider_ro_round_rate_parent);
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static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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/* if read only, just return current value */
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if (divider->flags & CLK_DIVIDER_READ_ONLY) {
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u32 val;
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val = clk_div_readl(divider) >> divider->shift;
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val &= clk_div_mask(divider->width);
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return divider_ro_round_rate(hw, rate, prate, divider->table,
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divider->width, divider->flags,
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val);
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}
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return divider_round_rate(hw, rate, prate, divider->table,
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divider->width, divider->flags);
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}
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int divider_get_val(unsigned long rate, unsigned long parent_rate,
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const struct clk_div_table *table, u8 width,
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unsigned long flags)
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{
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unsigned int div, value;
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div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
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if (!_is_valid_div(table, div, flags))
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return -EINVAL;
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value = _get_val(table, div, flags, width);
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return min_t(unsigned int, value, clk_div_mask(width));
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}
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EXPORT_SYMBOL_GPL(divider_get_val);
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static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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int value;
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unsigned long flags = 0;
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u32 val;
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value = divider_get_val(rate, parent_rate, divider->table,
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divider->width, divider->flags);
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if (value < 0)
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return value;
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if (divider->lock)
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spin_lock_irqsave(divider->lock, flags);
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else
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__acquire(divider->lock);
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if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
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val = clk_div_mask(divider->width) << (divider->shift + 16);
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} else {
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val = clk_div_readl(divider);
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val &= ~(clk_div_mask(divider->width) << divider->shift);
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}
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val |= (u32)value << divider->shift;
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clk_div_writel(divider, val);
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if (divider->lock)
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spin_unlock_irqrestore(divider->lock, flags);
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else
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__release(divider->lock);
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return 0;
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}
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const struct clk_ops clk_divider_ops = {
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.recalc_rate = clk_divider_recalc_rate,
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.round_rate = clk_divider_round_rate,
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.set_rate = clk_divider_set_rate,
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};
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EXPORT_SYMBOL_GPL(clk_divider_ops);
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const struct clk_ops clk_divider_ro_ops = {
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.recalc_rate = clk_divider_recalc_rate,
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.round_rate = clk_divider_round_rate,
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};
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EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
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struct clk_hw *__clk_hw_register_divider(struct device *dev,
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struct device_node *np, const char *name,
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const char *parent_name, const struct clk_hw *parent_hw,
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const struct clk_parent_data *parent_data, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
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const struct clk_div_table *table, spinlock_t *lock)
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{
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struct clk_divider *div;
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struct clk_hw *hw;
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struct clk_init_data init = {};
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int ret;
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if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
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if (width + shift > 16) {
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pr_warn("divider value exceeds LOWORD field\n");
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return ERR_PTR(-EINVAL);
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}
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}
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/* allocate the divider */
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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if (clk_divider_flags & CLK_DIVIDER_READ_ONLY)
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init.ops = &clk_divider_ro_ops;
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else
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init.ops = &clk_divider_ops;
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init.flags = flags;
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init.parent_names = parent_name ? &parent_name : NULL;
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init.parent_hws = parent_hw ? &parent_hw : NULL;
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init.parent_data = parent_data;
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if (parent_name || parent_hw || parent_data)
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init.num_parents = 1;
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else
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init.num_parents = 0;
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/* struct clk_divider assignments */
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div->reg = reg;
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div->shift = shift;
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div->width = width;
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div->flags = clk_divider_flags;
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div->lock = lock;
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div->hw.init = &init;
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div->table = table;
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/* register the clock */
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hw = &div->hw;
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ret = clk_hw_register(dev, hw);
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if (ret) {
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kfree(div);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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EXPORT_SYMBOL_GPL(__clk_hw_register_divider);
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/**
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* clk_register_divider_table - register a table based divider clock with
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* the clock framework
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* @dev: device registering this clock
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* @name: name of this clock
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* @parent_name: name of clock's parent
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* @flags: framework-specific flags
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* @reg: register address to adjust divider
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* @shift: number of bits to shift the bitfield
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* @width: width of the bitfield
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* @clk_divider_flags: divider-specific flags for this clock
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* @table: array of divider/value pairs ending with a div set to 0
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* @lock: shared register lock for this clock
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*/
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struct clk *clk_register_divider_table(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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u8 clk_divider_flags, const struct clk_div_table *table,
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spinlock_t *lock)
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{
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struct clk_hw *hw;
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hw = __clk_hw_register_divider(dev, NULL, name, parent_name, NULL,
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NULL, flags, reg, shift, width, clk_divider_flags,
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table, lock);
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if (IS_ERR(hw))
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return ERR_CAST(hw);
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return hw->clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_divider_table);
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void clk_unregister_divider(struct clk *clk)
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{
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struct clk_divider *div;
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struct clk_hw *hw;
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hw = __clk_get_hw(clk);
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if (!hw)
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return;
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div = to_clk_divider(hw);
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clk_unregister(clk);
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kfree(div);
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}
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EXPORT_SYMBOL_GPL(clk_unregister_divider);
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/**
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* clk_hw_unregister_divider - unregister a clk divider
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* @hw: hardware-specific clock data to unregister
|
*/
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void clk_hw_unregister_divider(struct clk_hw *hw)
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{
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struct clk_divider *div;
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div = to_clk_divider(hw);
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clk_hw_unregister(hw);
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kfree(div);
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}
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EXPORT_SYMBOL_GPL(clk_hw_unregister_divider);
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