/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef __MACH_TEGRA_IRAMMAP_H
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#define __MACH_TEGRA_IRAMMAP_H
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#include <linux/sizes.h>
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/* The first 1K of IRAM is permanently reserved for the CPU reset handler */
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#define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
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#define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
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/*
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* This area is used for LPx resume vector, only while LPx power state is
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* active. At other times, the AVP may use this area for arbitrary purposes
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*/
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#define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K)
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#endif
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