/*
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* From Coreboot src/southbridge/intel/bd82x6x/me.h
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*
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* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _ASM_INTEL_ME_H
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#define _ASM_INTEL_ME_H
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#include <asm/me_common.h>
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struct __packed mbp_fw_version_name {
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u32 major_version:16;
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u32 minor_version:16;
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u32 hotfix_version:16;
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u32 build_version:16;
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};
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struct __packed mbp_icc_profile {
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u8 num_icc_profiles;
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u8 icc_profile_soft_strap;
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u8 icc_profile_index;
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u8 reserved;
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u32 register_lock_mask[3];
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};
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struct __packed platform_type_rule_data {
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u32 platform_target_usage_type:4;
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u32 platform_target_market_type:2;
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u32 super_sku:1;
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u32 reserved:1;
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u32 intel_me_fw_image_type:4;
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u32 platform_brand:4;
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u32 reserved_1:16;
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};
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struct __packed mbp_fw_caps {
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struct mefwcaps_sku fw_capabilities;
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u8 available;
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};
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struct __packed mbp_plat_type {
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struct platform_type_rule_data rule_data;
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u8 available;
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};
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struct __packed me_bios_payload {
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struct mbp_fw_version_name fw_version_name;
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struct mbp_fw_caps fw_caps_sku;
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struct mbp_rom_bist_data rom_bist_data;
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struct mbp_platform_key platform_key;
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struct mbp_plat_type fw_plat_type;
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struct mbp_icc_profile icc_profile;
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struct tdt_state_info at_state;
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u32 mfsintegrity;
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};
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#endif
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