/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2015 Google, Inc
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*
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* SPDX-License-Identifier: Intel
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*/
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#ifndef _FSP_AZALIA_H_
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#define _FSP_AZALIA_H_
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struct __packed pch_azalia_verb_table_header {
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uint32_t vendor_device_id;
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uint16_t sub_system_id;
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uint8_t revision_id; /* 0xff applies to all steppings */
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uint8_t front_panel_support;
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uint16_t number_of_rear_jacks;
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uint16_t number_of_front_jacks;
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};
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struct __packed pch_azalia_verb_table {
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struct pch_azalia_verb_table_header verb_table_header;
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const uint32_t *verb_table_data;
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};
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struct __packed pch_azalia_config {
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uint8_t pme_enable:1;
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uint8_t docking_supported:1;
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uint8_t docking_attached:1;
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uint8_t hdmi_codec_enable:1;
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uint8_t azalia_v_ci_enable:1;
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uint8_t rsvdbits:3;
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/* number of verb tables provided by platform */
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uint8_t azalia_verb_table_num;
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const struct pch_azalia_verb_table *azalia_verb_table;
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/* delay timer after azalia reset */
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uint16_t reset_wait_timer_us;
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};
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#endif
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