/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __PHYDMADAPTIVITY_H__
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#define __PHYDMADAPTIVITY_H__
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#define ADAPTIVITY_VERSION "9.5.7" /*20170627 changed by Kevin, move adapt_igi_up from phydm.h to phydm_adaptivity.h*/
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#define pwdb_upper_bound 7
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#define dfir_loss 7
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
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enum phydm_regulation_type {
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REGULATION_FCC = 0,
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REGULATION_MKK = 1,
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REGULATION_ETSI = 2,
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REGULATION_WW = 3,
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MAX_REGULATION_NUM = 4
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};
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#endif
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enum phydm_adapinfo_e {
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PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0,
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PHYDM_ADAPINFO_DCBACKOFF,
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PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY,
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PHYDM_ADAPINFO_TH_L2H_INI,
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PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF,
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PHYDM_ADAPINFO_AP_NUM_TH
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};
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enum phydm_set_lna {
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phydm_disable_lna = 0,
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phydm_enable_lna = 1,
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};
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enum phydm_trx_mux_type {
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phydm_shutdown = 0,
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phydm_standby_mode = 1,
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phydm_tx_mode = 2,
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phydm_rx_mode = 3
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};
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enum phydm_mac_edcca_type {
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phydm_ignore_edcca = 0,
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phydm_dont_ignore_edcca = 1
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};
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enum phydm_adaptivity_mode {
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PHYDM_ADAPT_MSG = 0,
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PHYDM_ADAPT_DEBUG = 1,
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PHYDM_ADAPT_RESUME = 2,
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PHYDM_EDCCA_TH_PAUSE = 3,
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PHYDM_EDCCA_RESUME = 4
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};
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struct phydm_adaptivity_struct {
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s8 th_l2h_ini_backup;
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s8 th_edcca_hl_diff_backup;
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s8 igi_base;
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u8 igi_target;
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s8 h2l_lb;
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s8 l2h_lb;
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boolean is_check;
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boolean dynamic_link_adaptivity;
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u8 ap_num_th;
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u8 adajust_igi_level;
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s8 backup_l2h;
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s8 backup_h2l;
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boolean is_stop_edcca;
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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RT_WORK_ITEM phydm_pause_edcca_work_item;
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RT_WORK_ITEM phydm_resume_edcca_work_item;
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#endif
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u32 adaptivity_dbg_port; /*N:0x208, AC:0x209*/
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u8 debug_mode;
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s8 th_l2h_ini_debug;
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u16 igi_up_bound_lmt_cnt; /*When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/
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u16 igi_up_bound_lmt_val; /*max value of igi_up_bound_lmt_cnt*/
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boolean igi_lmt_en;
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u8 adapt_igi_up;
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s8 rvrt_val[2];
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s8 th_l2h;
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s8 th_h2l;
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};
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void
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phydm_pause_edcca(
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void *p_dm_void,
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boolean is_pasue_edcca
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);
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void
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phydm_check_environment(
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void *p_dm_void
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);
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void
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phydm_mac_edcca_state(
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void *p_dm_void,
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enum phydm_mac_edcca_type state
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);
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void
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phydm_set_edcca_threshold(
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void *p_dm_void,
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s8 H2L,
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s8 L2H
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);
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void
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phydm_set_trx_mux(
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void *p_dm_void,
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enum phydm_trx_mux_type tx_mode,
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enum phydm_trx_mux_type rx_mode
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);
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void
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phydm_search_pwdb_lower_bound(
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void *p_dm_void
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);
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void
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phydm_adaptivity_info_init(
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void *p_dm_void,
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enum phydm_adapinfo_e cmn_info,
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u32 value
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);
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void
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phydm_adaptivity_init(
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void *p_dm_void
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);
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void
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phydm_adaptivity(
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void *p_dm_void
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);
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void
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phydm_set_edcca_threshold_api(
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void *p_dm_void,
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u8 IGI
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);
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void
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phydm_pause_edcca_work_item_callback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct _ADAPTER *adapter
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#else
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void *p_dm_void
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#endif
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);
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void
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phydm_resume_edcca_work_item_callback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct _ADAPTER *adapter
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#else
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void *p_dm_void
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#endif
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);
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void
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phydm_adaptivity_debug(
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void *p_dm_void,
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u32 *const dm_value,
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u32 *_used,
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char *output,
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u32 *_out_len
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);
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void
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phydm_set_l2h_th_ini(
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void *p_dm_void
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);
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void
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phydm_set_forgetting_factor(
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void *p_dm_void
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);
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void
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phydm_set_pwdb_mode(
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void *p_dm_void
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);
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void
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phydm_set_edcca_val(
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void *p_dm_void,
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u32 *val_buf,
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u8 val_len
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);
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#endif
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