/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __HALHWOUTSRC_H__
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#define __HALHWOUTSRC_H__
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/*--------------------------Define -------------------------------------------*/
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#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
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sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
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#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
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sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
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#define AGC_DIFF_CONFIG(ic, band) do {\
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if (pDM_Odm->bIsMPChip)\
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AGC_DIFF_CONFIG_MP(ic,band);\
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else\
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AGC_DIFF_CONFIG_TC(ic,band);\
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} while(0)
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//============================================================
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// structure and define
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//============================================================
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__PACK typedef struct _Phy_Rx_AGC_Info
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{
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte gain:7,trsw:1;
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#else
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u1Byte trsw:1,gain:7;
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#endif
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} __WLAN_ATTRIB_PACK__ PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T;
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__PACK typedef struct _Phy_Status_Rpt_8192cd {
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PHY_RX_AGC_INFO_T path_agc[2];
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u1Byte ch_corr[2];
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u1Byte cck_sig_qual_ofdm_pwdb_all;
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u1Byte cck_agc_rpt_ofdm_cfosho_a;
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u1Byte cck_rpt_b_ofdm_cfosho_b;
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u1Byte rsvd_1;/*ch_corr_msb;*/
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u1Byte noise_power_db_msb;
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s1Byte path_cfotail[2];
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u1Byte pcts_mask[2];
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s1Byte stream_rxevm[2];
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u1Byte path_rxsnr[2];
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u1Byte noise_power_db_lsb;
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u1Byte rsvd_2[3];
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u1Byte stream_csi[2];
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u1Byte stream_target_csi[2];
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s1Byte sig_evm;
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u1Byte rsvd_3;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/
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u1Byte sgi_en: 1;
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u1Byte rxsc: 2;
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u1Byte idle_long: 1;
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u1Byte r_ant_train_en: 1;
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u1Byte ant_sel_b: 1;
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u1Byte ant_sel: 1;
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#else /*_BIG_ENDIAN_ */
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u1Byte ant_sel: 1;
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u1Byte ant_sel_b: 1;
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u1Byte r_ant_train_en: 1;
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u1Byte idle_long: 1;
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u1Byte rxsc: 2;
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u1Byte sgi_en: 1;
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u1Byte antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/
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#endif
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} __WLAN_ATTRIB_PACK__ PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T;
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typedef struct _Phy_Status_Rpt_8812 {
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/* DWORD 0*/
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u1Byte gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/
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u1Byte chl_num_LSB; /*channel number[7:0]*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte chl_num_MSB: 2; /*channel number[9:8]*/
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u1Byte sub_chnl: 4; /*sub-channel location[3:0]*/
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u1Byte r_RFMOD: 2; /*RF mode[1:0]*/
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#else /*_BIG_ENDIAN_ */
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u1Byte r_RFMOD: 2;
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u1Byte sub_chnl: 4;
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u1Byte chl_num_MSB: 2;
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#endif
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/* DWORD 1*/
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u1Byte pwdb_all; /*CCK signal quality / OFDM pwdb all*/
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s1Byte cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM Path-A and Path-B short CFO*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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/*this should be checked again because the definition of 8812 and 8814 is different*/
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/* u1Byte r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/
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/* u1Byte cck_rx_path:4; cck rx path[3:0]*/
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u1Byte resvd_0: 6;
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u1Byte bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/
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#else /*_BIG_ENDIAN_*/
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u1Byte bt_RF_ch_MSB: 2;
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u1Byte resvd_0: 6;
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#endif
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/* DWORD 2*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/
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u1Byte ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/
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u1Byte bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/
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#else /*_BIG_ENDIAN_ */
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u1Byte bt_RF_ch_LSB: 6;
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u1Byte ant_div_sw_b: 1;
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u1Byte ant_div_sw_a: 1;
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#endif
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s1Byte cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/
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u1Byte PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/
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u1Byte PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/
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/* DWORD 3*/
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s1Byte rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/
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s1Byte rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/
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/* DWORD 4*/
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u1Byte PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/
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u1Byte pcts_rpt_valid: 1; /*pcts_rpt_valid*/
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u1Byte resvd_1: 1; /*1'b0*/
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#else /*_BIG_ENDIAN_*/
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u1Byte resvd_1: 1;
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u1Byte pcts_rpt_valid: 1;
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u1Byte PCTS_MSK_RPT_3: 6;
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#endif
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s1Byte rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/
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/* DWORD 5*/
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u1Byte csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/
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u1Byte gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/
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/* DWORD 6*/
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s1Byte sigevm; /*signal field EVM*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/
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u1Byte antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/
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u1Byte dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/
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u1Byte GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/
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#else /*_BIG_ENDIAN_*/
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u1Byte GNT_BT_keep: 1;
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u1Byte dpdt_ctrl_keep: 1;
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u1Byte antidx_antd: 3;
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u1Byte antidx_antc: 3;
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#endif
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte antidx_anta: 3; /*antidx_anta[2:0]*/
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u1Byte antidx_antb: 3; /*antidx_antb[2:0]*/
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u1Byte resvd_2: 2; /*1'b0*/
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#else /*_BIG_ENDIAN_*/
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u1Byte resvd_2: 2;
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u1Byte antidx_antb: 3;
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u1Byte antidx_anta: 3;
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#endif
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} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T;
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VOID
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odm_Init_RSSIForDM(
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IN OUT PDM_ODM_T pDM_Odm
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);
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VOID
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ODM_PhyStatusQuery(
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IN OUT PDM_ODM_T pDM_Odm,
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OUT PODM_PHY_INFO_T pPhyInfo,
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IN pu1Byte pPhyStatus,
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IN PODM_PACKET_INFO_T pPktinfo
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);
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VOID
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ODM_MacStatusQuery(
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IN OUT PDM_ODM_T pDM_Odm,
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IN pu1Byte pMacStatus,
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IN u1Byte MacID,
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IN BOOLEAN bPacketMatchBSSID,
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IN BOOLEAN bPacketToSelf,
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IN BOOLEAN bPacketBeacon
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);
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HAL_STATUS
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ODM_ConfigRFWithTxPwrTrackHeaderFile(
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IN PDM_ODM_T pDM_Odm
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);
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HAL_STATUS
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ODM_ConfigRFWithHeaderFile(
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IN PDM_ODM_T pDM_Odm,
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IN ODM_RF_Config_Type ConfigType,
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IN ODM_RF_RADIO_PATH_E eRFPath
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);
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HAL_STATUS
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ODM_ConfigBBWithHeaderFile(
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IN PDM_ODM_T pDM_Odm,
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IN ODM_BB_Config_Type ConfigType
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);
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HAL_STATUS
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ODM_ConfigMACWithHeaderFile(
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IN PDM_ODM_T pDM_Odm
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);
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HAL_STATUS
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ODM_ConfigFWWithHeaderFile(
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IN PDM_ODM_T pDM_Odm,
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IN ODM_FW_Config_Type ConfigType,
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OUT u1Byte *pFirmware,
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OUT u4Byte *pSize
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);
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u4Byte
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ODM_GetHWImgVersion(
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IN PDM_ODM_T pDM_Odm
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);
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s4Byte
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odm_SignalScaleMapping(
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IN OUT PDM_ODM_T pDM_Odm,
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IN s4Byte CurrSig
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);
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#if (RTL8822B_SUPPORT == 1)
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/*For 8822B only!! need to move to FW finally */
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/*==============================================*/
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VOID
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phydm_RxPhyStatusJaguarSeries2(
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IN PDM_ODM_T pPhydm,
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IN pu1Byte pPhyStatus,
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IN PODM_PACKET_INFO_T pPktinfo,
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OUT PODM_PHY_INFO_T pPhyInfo
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);
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typedef struct _Phy_Status_Rpt_Jaguar2_Type0 {
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/* DW0 */
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u1Byte page_num;
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u1Byte pwdb;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte gain: 6;
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u1Byte rsvd_0: 1;
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u1Byte trsw: 1;
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#else
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u1Byte trsw: 1;
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u1Byte rsvd_0: 1;
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u1Byte gain: 6;
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#endif
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u1Byte rsvd_1;
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/* DW1 */
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u1Byte rsvd_2;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte rxsc: 4;
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u1Byte agc_table: 4;
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#else
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u1Byte agc_table: 4;
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u1Byte rxsc: 4;
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#endif
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u1Byte channel;
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u1Byte band;
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/* DW2 */
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u2Byte length;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte antidx_a: 3;
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u1Byte antidx_b: 3;
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u1Byte rsvd_3: 2;
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u1Byte antidx_c: 3;
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u1Byte antidx_d: 3;
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u1Byte rsvd_4:2;
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#else
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u1Byte rsvd_3: 2;
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u1Byte antidx_b: 3;
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u1Byte antidx_a: 3;
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u1Byte rsvd_4:2;
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u1Byte antidx_d: 3;
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u1Byte antidx_c: 3;
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#endif
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/* DW3 */
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u1Byte signal_quality;
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u1Byte agc_rpt;
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u1Byte bb_power;
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u1Byte rsvd_5;
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/* DW4 */
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u4Byte rsvd_6;
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/* DW5 */
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u4Byte rsvd_7;
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/* DW6 */
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u4Byte rsvd_8;
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} PHY_STATUS_RPT_JAGUAR2_TYPE0, *PPHY_STATUS_RPT_JAGUAR2_TYPE0;
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typedef struct _Phy_Status_Rpt_Jaguar2_Type1 {
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/* DW0 and DW1 */
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u1Byte page_num;
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u1Byte pwdb[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte l_rxsc: 4;
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u1Byte ht_rxsc: 4;
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#else
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u1Byte ht_rxsc: 4;
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u1Byte l_rxsc: 4;
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#endif
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u1Byte channel;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte band: 2;
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u1Byte rsvd_0: 1;
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u1Byte hw_antsw_occu: 1;
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u1Byte gnt_bt: 1;
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u1Byte ldpc: 1;
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u1Byte stbc: 1;
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u1Byte beamformed: 1;
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#else
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u1Byte beamformed: 1;
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u1Byte stbc: 1;
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u1Byte ldpc: 1;
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u1Byte gnt_bt: 1;
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u1Byte hw_antsw_occu: 1;
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u1Byte rsvd_0: 1;
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u1Byte band: 2;
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#endif
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/* DW2 */
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u2Byte lsig_length;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte antidx_a: 3;
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u1Byte antidx_b: 3;
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u1Byte rsvd_1: 2;
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u1Byte antidx_c: 3;
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u1Byte antidx_d: 3;
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u1Byte rsvd_2: 2;
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#else
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u1Byte rsvd_1: 2;
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u1Byte antidx_b: 3;
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u1Byte antidx_a: 3;
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u1Byte rsvd_2: 2;
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u1Byte antidx_d: 3;
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u1Byte antidx_c: 3;
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#endif
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/* DW3 */
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u1Byte paid;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte paid_msb: 1;
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u1Byte gid: 6;
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u1Byte rsvd_3: 1;
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#else
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u1Byte rsvd_3: 1;
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u1Byte gid: 6;
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u1Byte paid_msb: 1;
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#endif
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u1Byte intf_pos;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte intf_pos_msb: 1;
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u1Byte rsvd_4: 2;
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u1Byte nb_intf_flag: 1;
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u1Byte rf_mode: 2;
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u1Byte rsvd_5: 2;
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#else
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u1Byte rsvd_5: 2;
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u1Byte rf_mode: 2;
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u1Byte nb_intf_flag: 1;
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u1Byte rsvd_4: 2;
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u1Byte intf_pos_msb: 1;
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#endif
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/* DW4 */
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s1Byte rxevm[4]; /* s(8,1) */
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/* DW5 */
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s1Byte cfo_tail[4]; /* s(8,7) */
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/* DW6 */
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s1Byte rxsnr[4]; /* s(8,1) */
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} PHY_STATUS_RPT_JAGUAR2_TYPE1, *PPHY_STATUS_RPT_JAGUAR2_TYPE1;
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typedef struct _Phy_Status_Rpt_Jaguar2_Type2 {
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/* DW0 ane DW1 */
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u1Byte page_num;
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u1Byte pwdb[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte l_rxsc: 4;
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u1Byte ht_rxsc: 4;
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#else
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u1Byte ht_rxsc: 4;
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u1Byte l_rxsc: 4;
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#endif
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u1Byte channel;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte band: 2;
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u1Byte rsvd_0: 1;
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u1Byte hw_antsw_occu: 1;
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u1Byte gnt_bt: 1;
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u1Byte ldpc: 1;
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u1Byte stbc: 1;
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u1Byte beamformed: 1;
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#else
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u1Byte beamformed: 1;
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u1Byte stbc: 1;
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u1Byte ldpc: 1;
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u1Byte gnt_bt: 1;
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u1Byte hw_antsw_occu: 1;
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u1Byte rsvd_0: 1;
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u1Byte band: 2;
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#endif
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/* DW2 */
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte shift_l_map: 6;
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u1Byte rsvd_1: 2;
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#else
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u1Byte rsvd_1: 2;
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u1Byte shift_l_map: 6;
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#endif
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u1Byte cnt_pw2cca;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte agc_table_a: 4;
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u1Byte agc_table_b: 4;
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u1Byte agc_table_c: 4;
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u1Byte agc_table_d: 4;
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#else
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u1Byte agc_table_b: 4;
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u1Byte agc_table_a: 4;
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u1Byte agc_table_d: 4;
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u1Byte agc_table_c: 4;
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#endif
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/* DW3 ~ DW6*/
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u1Byte cnt_cca2agc_rdy;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte gain_a: 6;
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u1Byte rsvd_2: 1;
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u1Byte trsw_a: 1;
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u1Byte gain_b: 6;
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u1Byte rsvd_3: 1;
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u1Byte trsw_b: 1;
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u1Byte gain_c: 6;
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u1Byte rsvd_4: 1;
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u1Byte trsw_c: 1;
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u1Byte gain_d: 6;
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u1Byte rsvd_5: 1;
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u1Byte trsw_d: 1;
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u1Byte aagc_step_a: 2;
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u1Byte aagc_step_b: 2;
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u1Byte aagc_step_c: 2;
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u1Byte aagc_step_d: 2;
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#else
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u1Byte trsw_a: 1;
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u1Byte rsvd_2: 1;
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u1Byte gain_a: 6;
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u1Byte trsw_b: 1;
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u1Byte rsvd_3: 1;
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u1Byte gain_b: 6;
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u1Byte trsw_c: 1;
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u1Byte rsvd_4: 1;
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u1Byte gain_c: 6;
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u1Byte trsw_d: 1;
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u1Byte rsvd_5: 1;
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u1Byte gain_d: 6;
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u1Byte aagc_step_d: 2;
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u1Byte aagc_step_c: 2;
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u1Byte aagc_step_b: 2;
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u1Byte aagc_step_a: 2;
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#endif
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u1Byte ht_aagc_gain[4];
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u1Byte dagc_gain[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u1Byte counter: 6;
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u1Byte rsvd_6: 2;
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u1Byte syn_count: 5;
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u1Byte rsvd_7:3;
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#else
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u1Byte rsvd_6: 2;
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u1Byte counter: 6;
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u1Byte rsvd_7:3;
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u1Byte syn_count: 5;
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#endif
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} PHY_STATUS_RPT_JAGUAR2_TYPE2, *PPHY_STATUS_RPT_JAGUAR2_TYPE2;
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/*==============================================*/
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#endif
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#endif
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