/*
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* Copyright (C) 2014 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MACH_ROCKCHIP_SRAM_DELAY_H
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#define __MACH_ROCKCHIP_SRAM_DELAY_H
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#include <asm/arch_timer.h>
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/*
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* Arch timer freq is present in dts. We could get it from there but
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* really nobody is going to put anything but 24MHz here. If they do then
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* we'll have to add this to the suspend data.
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*/
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#define ARCH_TIMER_FREQ 24000000
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#define ARCH_TIMER_TICKS_PER_US (ARCH_TIMER_FREQ / 1000000)
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static inline void sram_udelay(u32 us)
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{
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u32 orig;
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u32 to_wait = ARCH_TIMER_TICKS_PER_US * us;
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/* Note: u32 math is way more than enough for our small delays */
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orig = (u32) arch_counter_get_cntpct();
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while ((u32) arch_counter_get_cntpct() - orig <= to_wait)
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;
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}
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#endif /* MACH_ROCKCHIP_SRAM_DELAY_H */
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