// SPDX-License-Identifier: GPL-2.0-only
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/*
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* VMX-preemption timer test
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*
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* Copyright (C) 2020, Google, LLC.
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*
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* Test to ensure the VM-Enter after migration doesn't
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* incorrectly restarts the timer with the full timer
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* value instead of partially decayed timer value
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*
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*/
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#define _GNU_SOURCE /* for program_invocation_short_name */
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include "test_util.h"
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#include "kvm_util.h"
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#include "processor.h"
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#include "vmx.h"
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#define VCPU_ID 5
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#define PREEMPTION_TIMER_VALUE 100000000ull
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#define PREEMPTION_TIMER_VALUE_THRESHOLD1 80000000ull
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u32 vmx_pt_rate;
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bool l2_save_restore_done;
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static u64 l2_vmx_pt_start;
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volatile u64 l2_vmx_pt_finish;
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union vmx_basic basic;
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union vmx_ctrl_msr ctrl_pin_rev;
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union vmx_ctrl_msr ctrl_exit_rev;
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void l2_guest_code(void)
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{
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u64 vmx_pt_delta;
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vmcall();
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l2_vmx_pt_start = (rdtsc() >> vmx_pt_rate) << vmx_pt_rate;
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/*
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* Wait until the 1st threshold has passed
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*/
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do {
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l2_vmx_pt_finish = rdtsc();
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vmx_pt_delta = (l2_vmx_pt_finish - l2_vmx_pt_start) >>
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vmx_pt_rate;
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} while (vmx_pt_delta < PREEMPTION_TIMER_VALUE_THRESHOLD1);
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/*
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* Force L2 through Save and Restore cycle
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*/
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GUEST_SYNC(1);
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l2_save_restore_done = 1;
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/*
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* Now wait for the preemption timer to fire and
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* exit to L1
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*/
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while ((l2_vmx_pt_finish = rdtsc()))
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;
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}
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void l1_guest_code(struct vmx_pages *vmx_pages)
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{
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#define L2_GUEST_STACK_SIZE 64
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unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE];
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u64 l1_vmx_pt_start;
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u64 l1_vmx_pt_finish;
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u64 l1_tsc_deadline, l2_tsc_deadline;
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GUEST_ASSERT(vmx_pages->vmcs_gpa);
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GUEST_ASSERT(prepare_for_vmx_operation(vmx_pages));
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GUEST_ASSERT(load_vmcs(vmx_pages));
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GUEST_ASSERT(vmptrstz() == vmx_pages->vmcs_gpa);
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prepare_vmcs(vmx_pages, l2_guest_code,
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&l2_guest_stack[L2_GUEST_STACK_SIZE]);
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/*
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* Check for Preemption timer support
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*/
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basic.val = rdmsr(MSR_IA32_VMX_BASIC);
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ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PINBASED_CTLS
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: MSR_IA32_VMX_PINBASED_CTLS);
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ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT_CTLS
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: MSR_IA32_VMX_EXIT_CTLS);
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if (!(ctrl_pin_rev.clr & PIN_BASED_VMX_PREEMPTION_TIMER) ||
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!(ctrl_exit_rev.clr & VM_EXIT_SAVE_VMX_PREEMPTION_TIMER))
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return;
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GUEST_ASSERT(!vmlaunch());
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GUEST_ASSERT(vmreadz(VM_EXIT_REASON) == EXIT_REASON_VMCALL);
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vmwrite(GUEST_RIP, vmreadz(GUEST_RIP) + vmreadz(VM_EXIT_INSTRUCTION_LEN));
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/*
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* Turn on PIN control and resume the guest
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*/
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GUEST_ASSERT(!vmwrite(PIN_BASED_VM_EXEC_CONTROL,
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vmreadz(PIN_BASED_VM_EXEC_CONTROL) |
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PIN_BASED_VMX_PREEMPTION_TIMER));
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GUEST_ASSERT(!vmwrite(VMX_PREEMPTION_TIMER_VALUE,
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PREEMPTION_TIMER_VALUE));
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vmx_pt_rate = rdmsr(MSR_IA32_VMX_MISC) & 0x1F;
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l2_save_restore_done = 0;
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l1_vmx_pt_start = (rdtsc() >> vmx_pt_rate) << vmx_pt_rate;
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GUEST_ASSERT(!vmresume());
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l1_vmx_pt_finish = rdtsc();
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/*
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* Ensure exit from L2 happens after L2 goes through
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* save and restore
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*/
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GUEST_ASSERT(l2_save_restore_done);
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/*
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* Ensure the exit from L2 is due to preemption timer expiry
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*/
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GUEST_ASSERT(vmreadz(VM_EXIT_REASON) == EXIT_REASON_PREEMPTION_TIMER);
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l1_tsc_deadline = l1_vmx_pt_start +
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(PREEMPTION_TIMER_VALUE << vmx_pt_rate);
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l2_tsc_deadline = l2_vmx_pt_start +
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(PREEMPTION_TIMER_VALUE << vmx_pt_rate);
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/*
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* Sync with the host and pass the l1|l2 pt_expiry_finish times and
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* tsc deadlines so that host can verify they are as expected
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*/
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GUEST_SYNC_ARGS(2, l1_vmx_pt_finish, l1_tsc_deadline,
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l2_vmx_pt_finish, l2_tsc_deadline);
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}
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void guest_code(struct vmx_pages *vmx_pages)
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{
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if (vmx_pages)
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l1_guest_code(vmx_pages);
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GUEST_DONE();
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}
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int main(int argc, char *argv[])
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{
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vm_vaddr_t vmx_pages_gva = 0;
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struct kvm_regs regs1, regs2;
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struct kvm_vm *vm;
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struct kvm_run *run;
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struct kvm_x86_state *state;
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struct ucall uc;
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int stage;
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/*
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* AMD currently does not implement any VMX features, so for now we
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* just early out.
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*/
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nested_vmx_check_supported();
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/* Create VM */
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vm = vm_create_default(VCPU_ID, 0, guest_code);
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vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid());
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run = vcpu_state(vm, VCPU_ID);
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vcpu_regs_get(vm, VCPU_ID, ®s1);
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if (kvm_check_cap(KVM_CAP_NESTED_STATE)) {
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vcpu_alloc_vmx(vm, &vmx_pages_gva);
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vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva);
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} else {
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pr_info("will skip vmx preemption timer checks\n");
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goto done;
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}
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for (stage = 1;; stage++) {
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_vcpu_run(vm, VCPU_ID);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_IO,
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"Stage %d: unexpected exit reason: %u (%s),\n",
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stage, run->exit_reason,
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exit_reason_str(run->exit_reason));
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switch (get_ucall(vm, VCPU_ID, &uc)) {
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case UCALL_ABORT:
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TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0],
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__FILE__, uc.args[1]);
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/* NOT REACHED */
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case UCALL_SYNC:
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break;
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case UCALL_DONE:
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goto done;
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default:
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TEST_FAIL("Unknown ucall %lu", uc.cmd);
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}
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/* UCALL_SYNC is handled here. */
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TEST_ASSERT(!strcmp((const char *)uc.args[0], "hello") &&
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uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx",
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stage, (ulong)uc.args[1]);
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/*
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* If this stage 2 then we should verify the vmx pt expiry
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* is as expected.
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* From L1's perspective verify Preemption timer hasn't
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* expired too early.
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* From L2's perspective verify Preemption timer hasn't
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* expired too late.
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*/
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if (stage == 2) {
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pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n",
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stage, uc.args[2], uc.args[3]);
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pr_info("Stage %d: L2 PT expiry TSC (%lu) , L2 TSC deadline (%lu)\n",
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stage, uc.args[4], uc.args[5]);
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TEST_ASSERT(uc.args[2] >= uc.args[3],
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"Stage %d: L1 PT expiry TSC (%lu) < L1 TSC deadline (%lu)",
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stage, uc.args[2], uc.args[3]);
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TEST_ASSERT(uc.args[4] < uc.args[5],
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"Stage %d: L2 PT expiry TSC (%lu) > L2 TSC deadline (%lu)",
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stage, uc.args[4], uc.args[5]);
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}
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state = vcpu_save_state(vm, VCPU_ID);
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memset(®s1, 0, sizeof(regs1));
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vcpu_regs_get(vm, VCPU_ID, ®s1);
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kvm_vm_release(vm);
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/* Restore state in a new VM. */
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kvm_vm_restart(vm, O_RDWR);
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vm_vcpu_add(vm, VCPU_ID);
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vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid());
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vcpu_load_state(vm, VCPU_ID, state);
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run = vcpu_state(vm, VCPU_ID);
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free(state);
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memset(®s2, 0, sizeof(regs2));
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vcpu_regs_get(vm, VCPU_ID, ®s2);
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TEST_ASSERT(!memcmp(®s1, ®s2, sizeof(regs2)),
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"Unexpected register values after vcpu_load_state; rdi: %lx rsi: %lx",
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(ulong) regs2.rdi, (ulong) regs2.rsi);
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}
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done:
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kvm_vm_free(vm);
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}
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