// SPDX-License-Identifier: GPL-2.0+
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/*
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* Comedi driver for CIO-DAS16/M1
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* Author: Frank Mori Hess, based on code from the das16 driver.
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* Copyright (C) 2001 Frank Mori Hess <fmhess@users.sourceforge.net>
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 2000 David A. Schleef <ds@schleef.org>
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*/
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/*
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* Driver: das16m1
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* Description: CIO-DAS16/M1
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* Author: Frank Mori Hess <fmhess@users.sourceforge.net>
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* Devices: [Measurement Computing] CIO-DAS16/M1 (das16m1)
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* Status: works
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*
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* This driver supports a single board - the CIO-DAS16/M1. As far as I know,
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* there are no other boards that have the same register layout. Even the
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* CIO-DAS16/M1/16 is significantly different.
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*
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* I was _barely_ able to reach the full 1 MHz capability of this board, using
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* a hard real-time interrupt (set the TRIG_RT flag in your struct comedi_cmd
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* and use rtlinux or RTAI). The board can't do dma, so the bottleneck is
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* pulling the data across the ISA bus. I timed the interrupt handler, and it
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* took my computer ~470 microseconds to pull 512 samples from the board. So
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* at 1 Mhz sampling rate, expect your CPU to be spending almost all of its
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* time in the interrupt handler.
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*
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* This board has some unusual restrictions for its channel/gain list. If the
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* list has 2 or more channels in it, then two conditions must be satisfied:
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* (1) - even/odd channels must appear at even/odd indices in the list
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* (2) - the list must have an even number of entries.
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*
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* Configuration options:
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* [0] - base io address
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* [1] - irq (optional, but you probably want it)
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*
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* irq can be omitted, although the cmd interface will not work without it.
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include "../comedidev.h"
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#include "8255.h"
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#include "comedi_8254.h"
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/*
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* Register map (dev->iobase)
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*/
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#define DAS16M1_AI_REG 0x00 /* 16-bit register */
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#define DAS16M1_AI_TO_CHAN(x) (((x) >> 0) & 0xf)
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#define DAS16M1_AI_TO_SAMPLE(x) (((x) >> 4) & 0xfff)
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#define DAS16M1_CS_REG 0x02
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#define DAS16M1_CS_EXT_TRIG BIT(0)
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#define DAS16M1_CS_OVRUN BIT(5)
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#define DAS16M1_CS_IRQDATA BIT(7)
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#define DAS16M1_DI_REG 0x03
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#define DAS16M1_DO_REG 0x03
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#define DAS16M1_CLR_INTR_REG 0x04
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#define DAS16M1_INTR_CTRL_REG 0x05
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#define DAS16M1_INTR_CTRL_PACER(x) (((x) & 0x3) << 0)
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#define DAS16M1_INTR_CTRL_PACER_EXT DAS16M1_INTR_CTRL_PACER(2)
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#define DAS16M1_INTR_CTRL_PACER_INT DAS16M1_INTR_CTRL_PACER(3)
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#define DAS16M1_INTR_CTRL_PACER_MASK DAS16M1_INTR_CTRL_PACER(3)
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#define DAS16M1_INTR_CTRL_IRQ(x) (((x) & 0x7) << 4)
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#define DAS16M1_INTR_CTRL_INTE BIT(7)
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#define DAS16M1_Q_ADDR_REG 0x06
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#define DAS16M1_Q_REG 0x07
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#define DAS16M1_Q_CHAN(x) (((x) & 0x7) << 0)
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#define DAS16M1_Q_RANGE(x) (((x) & 0xf) << 4)
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#define DAS16M1_8254_IOBASE1 0x08
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#define DAS16M1_8254_IOBASE2 0x0c
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#define DAS16M1_8255_IOBASE 0x400
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#define DAS16M1_8254_IOBASE3 0x404
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#define DAS16M1_SIZE2 0x08
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#define DAS16M1_AI_FIFO_SZ 1024 /* # samples */
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static const struct comedi_lrange range_das16m1 = {
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9, {
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BIP_RANGE(5),
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BIP_RANGE(2.5),
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BIP_RANGE(1.25),
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BIP_RANGE(0.625),
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UNI_RANGE(10),
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UNI_RANGE(5),
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UNI_RANGE(2.5),
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UNI_RANGE(1.25),
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BIP_RANGE(10)
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}
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};
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struct das16m1_private {
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struct comedi_8254 *counter;
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unsigned int intr_ctrl;
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unsigned int adc_count;
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u16 initial_hw_count;
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unsigned short ai_buffer[DAS16M1_AI_FIFO_SZ];
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unsigned long extra_iobase;
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};
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static void das16m1_ai_set_queue(struct comedi_device *dev,
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unsigned int *chanspec, unsigned int len)
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{
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unsigned int i;
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for (i = 0; i < len; i++) {
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unsigned int chan = CR_CHAN(chanspec[i]);
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unsigned int range = CR_RANGE(chanspec[i]);
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outb(i, dev->iobase + DAS16M1_Q_ADDR_REG);
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outb(DAS16M1_Q_CHAN(chan) | DAS16M1_Q_RANGE(range),
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dev->iobase + DAS16M1_Q_REG);
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}
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}
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static void das16m1_ai_munge(struct comedi_device *dev,
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struct comedi_subdevice *s,
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void *data, unsigned int num_bytes,
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unsigned int start_chan_index)
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{
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unsigned short *array = data;
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unsigned int nsamples = comedi_bytes_to_samples(s, num_bytes);
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unsigned int i;
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/*
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* The fifo values have the channel number in the lower 4-bits and
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* the sample in the upper 12-bits. This just shifts the values
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* to remove the channel numbers.
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*/
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for (i = 0; i < nsamples; i++)
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array[i] = DAS16M1_AI_TO_SAMPLE(array[i]);
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}
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static int das16m1_ai_check_chanlist(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_cmd *cmd)
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{
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int i;
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if (cmd->chanlist_len == 1)
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return 0;
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if ((cmd->chanlist_len % 2) != 0) {
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dev_dbg(dev->class_dev,
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"chanlist must be of even length or length 1\n");
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return -EINVAL;
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}
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for (i = 0; i < cmd->chanlist_len; i++) {
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unsigned int chan = CR_CHAN(cmd->chanlist[i]);
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if ((i % 2) != (chan % 2)) {
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dev_dbg(dev->class_dev,
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"even/odd channels must go have even/odd chanlist indices\n");
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return -EINVAL;
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}
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}
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return 0;
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}
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static int das16m1_ai_cmdtest(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_cmd *cmd)
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{
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int err = 0;
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/* Step 1 : check if triggers are trivially valid */
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err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
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err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
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err |= comedi_check_trigger_src(&cmd->convert_src,
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TRIG_TIMER | TRIG_EXT);
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err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
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err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
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if (err)
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return 1;
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/* Step 2a : make sure trigger sources are unique */
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err |= comedi_check_trigger_is_unique(cmd->start_src);
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err |= comedi_check_trigger_is_unique(cmd->convert_src);
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err |= comedi_check_trigger_is_unique(cmd->stop_src);
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/* Step 2b : and mutually compatible */
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if (err)
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return 2;
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/* Step 3: check if arguments are trivially valid */
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err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
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if (cmd->scan_begin_src == TRIG_FOLLOW) /* internal trigger */
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err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
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if (cmd->convert_src == TRIG_TIMER)
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err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 1000);
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err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
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cmd->chanlist_len);
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if (cmd->stop_src == TRIG_COUNT)
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err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
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else /* TRIG_NONE */
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err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
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if (err)
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return 3;
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/* step 4: fix up arguments */
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if (cmd->convert_src == TRIG_TIMER) {
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unsigned int arg = cmd->convert_arg;
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comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
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err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
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}
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if (err)
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return 4;
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/* Step 5: check channel list if it exists */
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if (cmd->chanlist && cmd->chanlist_len > 0)
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err |= das16m1_ai_check_chanlist(dev, s, cmd);
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if (err)
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return 5;
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return 0;
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}
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static int das16m1_ai_cmd(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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struct das16m1_private *devpriv = dev->private;
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struct comedi_async *async = s->async;
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struct comedi_cmd *cmd = &async->cmd;
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unsigned int byte;
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/* set software count */
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devpriv->adc_count = 0;
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/*
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* Initialize lower half of hardware counter, used to determine how
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* many samples are in fifo. Value doesn't actually load into counter
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* until counter's next clock (the next a/d conversion).
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*/
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comedi_8254_set_mode(devpriv->counter, 1, I8254_MODE2 | I8254_BINARY);
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comedi_8254_write(devpriv->counter, 1, 0);
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/*
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* Remember current reading of counter so we know when counter has
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* actually been loaded.
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*/
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devpriv->initial_hw_count = comedi_8254_read(devpriv->counter, 1);
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das16m1_ai_set_queue(dev, cmd->chanlist, cmd->chanlist_len);
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/* enable interrupts and set internal pacer counter mode and counts */
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devpriv->intr_ctrl &= ~DAS16M1_INTR_CTRL_PACER_MASK;
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if (cmd->convert_src == TRIG_TIMER) {
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comedi_8254_update_divisors(dev->pacer);
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comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
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devpriv->intr_ctrl |= DAS16M1_INTR_CTRL_PACER_INT;
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} else { /* TRIG_EXT */
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devpriv->intr_ctrl |= DAS16M1_INTR_CTRL_PACER_EXT;
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}
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/* set control & status register */
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byte = 0;
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/*
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* If we are using external start trigger (also board dislikes having
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* both start and conversion triggers external simultaneously).
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*/
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if (cmd->start_src == TRIG_EXT && cmd->convert_src != TRIG_EXT)
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byte |= DAS16M1_CS_EXT_TRIG;
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outb(byte, dev->iobase + DAS16M1_CS_REG);
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/* clear interrupt */
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outb(0, dev->iobase + DAS16M1_CLR_INTR_REG);
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devpriv->intr_ctrl |= DAS16M1_INTR_CTRL_INTE;
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outb(devpriv->intr_ctrl, dev->iobase + DAS16M1_INTR_CTRL_REG);
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return 0;
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}
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static int das16m1_ai_cancel(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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struct das16m1_private *devpriv = dev->private;
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/* disable interrupts and pacer */
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devpriv->intr_ctrl &= ~(DAS16M1_INTR_CTRL_INTE |
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DAS16M1_INTR_CTRL_PACER_MASK);
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outb(devpriv->intr_ctrl, dev->iobase + DAS16M1_INTR_CTRL_REG);
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return 0;
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}
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static int das16m1_ai_eoc(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned long context)
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{
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unsigned int status;
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status = inb(dev->iobase + DAS16M1_CS_REG);
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if (status & DAS16M1_CS_IRQDATA)
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return 0;
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return -EBUSY;
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}
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static int das16m1_ai_insn_read(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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int ret;
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int i;
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das16m1_ai_set_queue(dev, &insn->chanspec, 1);
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for (i = 0; i < insn->n; i++) {
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unsigned short val;
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/* clear interrupt */
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outb(0, dev->iobase + DAS16M1_CLR_INTR_REG);
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/* trigger conversion */
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outb(0, dev->iobase + DAS16M1_AI_REG);
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ret = comedi_timeout(dev, s, insn, das16m1_ai_eoc, 0);
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if (ret)
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return ret;
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val = inw(dev->iobase + DAS16M1_AI_REG);
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data[i] = DAS16M1_AI_TO_SAMPLE(val);
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}
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return insn->n;
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}
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static int das16m1_di_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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data[1] = inb(dev->iobase + DAS16M1_DI_REG) & 0xf;
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return insn->n;
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}
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static int das16m1_do_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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if (comedi_dio_update_state(s, data))
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outb(s->state, dev->iobase + DAS16M1_DO_REG);
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data[1] = s->state;
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return insn->n;
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}
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static void das16m1_handler(struct comedi_device *dev, unsigned int status)
|
{
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struct das16m1_private *devpriv = dev->private;
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struct comedi_subdevice *s = dev->read_subdev;
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struct comedi_async *async = s->async;
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struct comedi_cmd *cmd = &async->cmd;
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u16 num_samples;
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u16 hw_counter;
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/* figure out how many samples are in fifo */
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hw_counter = comedi_8254_read(devpriv->counter, 1);
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/*
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* Make sure hardware counter reading is not bogus due to initial
|
* value not having been loaded yet.
|
*/
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if (devpriv->adc_count == 0 &&
|
hw_counter == devpriv->initial_hw_count) {
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num_samples = 0;
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} else {
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/*
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* The calculation of num_samples looks odd, but it uses the
|
* following facts. 16 bit hardware counter is initialized with
|
* value of zero (which really means 0x1000). The counter
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* decrements by one on each conversion (when the counter
|
* decrements from zero it goes to 0xffff). num_samples is a
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* 16 bit variable, so it will roll over in a similar fashion
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* to the hardware counter. Work it out, and this is what you
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* get.
|
*/
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num_samples = -hw_counter - devpriv->adc_count;
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}
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/* check if we only need some of the points */
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if (cmd->stop_src == TRIG_COUNT) {
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if (num_samples > cmd->stop_arg * cmd->chanlist_len)
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num_samples = cmd->stop_arg * cmd->chanlist_len;
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}
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/* make sure we don't try to get too many points if fifo has overrun */
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if (num_samples > DAS16M1_AI_FIFO_SZ)
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num_samples = DAS16M1_AI_FIFO_SZ;
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insw(dev->iobase, devpriv->ai_buffer, num_samples);
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comedi_buf_write_samples(s, devpriv->ai_buffer, num_samples);
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devpriv->adc_count += num_samples;
|
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if (cmd->stop_src == TRIG_COUNT) {
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if (devpriv->adc_count >= cmd->stop_arg * cmd->chanlist_len) {
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/* end of acquisition */
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async->events |= COMEDI_CB_EOA;
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}
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}
|
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/*
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* This probably won't catch overruns since the card doesn't generate
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* overrun interrupts, but we might as well try.
|
*/
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if (status & DAS16M1_CS_OVRUN) {
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async->events |= COMEDI_CB_ERROR;
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dev_err(dev->class_dev, "fifo overflow\n");
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}
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comedi_handle_events(dev, s);
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}
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static int das16m1_ai_poll(struct comedi_device *dev,
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struct comedi_subdevice *s)
|
{
|
unsigned long flags;
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unsigned int status;
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/* prevent race with interrupt handler */
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spin_lock_irqsave(&dev->spinlock, flags);
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status = inb(dev->iobase + DAS16M1_CS_REG);
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das16m1_handler(dev, status);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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return comedi_buf_n_bytes_ready(s);
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}
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static irqreturn_t das16m1_interrupt(int irq, void *d)
|
{
|
int status;
|
struct comedi_device *dev = d;
|
|
if (!dev->attached) {
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dev_err(dev->class_dev, "premature interrupt\n");
|
return IRQ_HANDLED;
|
}
|
/* prevent race with comedi_poll() */
|
spin_lock(&dev->spinlock);
|
|
status = inb(dev->iobase + DAS16M1_CS_REG);
|
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if ((status & (DAS16M1_CS_IRQDATA | DAS16M1_CS_OVRUN)) == 0) {
|
dev_err(dev->class_dev, "spurious interrupt\n");
|
spin_unlock(&dev->spinlock);
|
return IRQ_NONE;
|
}
|
|
das16m1_handler(dev, status);
|
|
/* clear interrupt */
|
outb(0, dev->iobase + DAS16M1_CLR_INTR_REG);
|
|
spin_unlock(&dev->spinlock);
|
return IRQ_HANDLED;
|
}
|
|
static int das16m1_irq_bits(unsigned int irq)
|
{
|
switch (irq) {
|
case 10:
|
return 0x0;
|
case 11:
|
return 0x1;
|
case 12:
|
return 0x2;
|
case 15:
|
return 0x3;
|
case 2:
|
return 0x4;
|
case 3:
|
return 0x5;
|
case 5:
|
return 0x6;
|
case 7:
|
return 0x7;
|
default:
|
return 0x0;
|
}
|
}
|
|
static int das16m1_attach(struct comedi_device *dev,
|
struct comedi_devconfig *it)
|
{
|
struct das16m1_private *devpriv;
|
struct comedi_subdevice *s;
|
int ret;
|
|
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
|
if (!devpriv)
|
return -ENOMEM;
|
|
ret = comedi_request_region(dev, it->options[0], 0x10);
|
if (ret)
|
return ret;
|
/* Request an additional region for the 8255 and 3rd 8254 */
|
ret = __comedi_request_region(dev, dev->iobase + DAS16M1_8255_IOBASE,
|
DAS16M1_SIZE2);
|
if (ret)
|
return ret;
|
devpriv->extra_iobase = dev->iobase + DAS16M1_8255_IOBASE;
|
|
/* only irqs 2, 3, 4, 5, 6, 7, 10, 11, 12, 14, and 15 are valid */
|
if ((1 << it->options[1]) & 0xdcfc) {
|
ret = request_irq(it->options[1], das16m1_interrupt, 0,
|
dev->board_name, dev);
|
if (ret == 0)
|
dev->irq = it->options[1];
|
}
|
|
dev->pacer = comedi_8254_init(dev->iobase + DAS16M1_8254_IOBASE2,
|
I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
|
if (!dev->pacer)
|
return -ENOMEM;
|
|
devpriv->counter = comedi_8254_init(dev->iobase + DAS16M1_8254_IOBASE1,
|
0, I8254_IO8, 0);
|
if (!devpriv->counter)
|
return -ENOMEM;
|
|
ret = comedi_alloc_subdevices(dev, 4);
|
if (ret)
|
return ret;
|
|
/* Analog Input subdevice */
|
s = &dev->subdevices[0];
|
s->type = COMEDI_SUBD_AI;
|
s->subdev_flags = SDF_READABLE | SDF_DIFF;
|
s->n_chan = 8;
|
s->maxdata = 0x0fff;
|
s->range_table = &range_das16m1;
|
s->insn_read = das16m1_ai_insn_read;
|
if (dev->irq) {
|
dev->read_subdev = s;
|
s->subdev_flags |= SDF_CMD_READ;
|
s->len_chanlist = 256;
|
s->do_cmdtest = das16m1_ai_cmdtest;
|
s->do_cmd = das16m1_ai_cmd;
|
s->cancel = das16m1_ai_cancel;
|
s->poll = das16m1_ai_poll;
|
s->munge = das16m1_ai_munge;
|
}
|
|
/* Digital Input subdevice */
|
s = &dev->subdevices[1];
|
s->type = COMEDI_SUBD_DI;
|
s->subdev_flags = SDF_READABLE;
|
s->n_chan = 4;
|
s->maxdata = 1;
|
s->range_table = &range_digital;
|
s->insn_bits = das16m1_di_insn_bits;
|
|
/* Digital Output subdevice */
|
s = &dev->subdevices[2];
|
s->type = COMEDI_SUBD_DO;
|
s->subdev_flags = SDF_WRITABLE;
|
s->n_chan = 4;
|
s->maxdata = 1;
|
s->range_table = &range_digital;
|
s->insn_bits = das16m1_do_insn_bits;
|
|
/* Digital I/O subdevice (8255) */
|
s = &dev->subdevices[3];
|
ret = subdev_8255_init(dev, s, NULL, DAS16M1_8255_IOBASE);
|
if (ret)
|
return ret;
|
|
/* initialize digital output lines */
|
outb(0, dev->iobase + DAS16M1_DO_REG);
|
|
/* set the interrupt level */
|
devpriv->intr_ctrl = DAS16M1_INTR_CTRL_IRQ(das16m1_irq_bits(dev->irq));
|
outb(devpriv->intr_ctrl, dev->iobase + DAS16M1_INTR_CTRL_REG);
|
|
return 0;
|
}
|
|
static void das16m1_detach(struct comedi_device *dev)
|
{
|
struct das16m1_private *devpriv = dev->private;
|
|
if (devpriv) {
|
if (devpriv->extra_iobase)
|
release_region(devpriv->extra_iobase, DAS16M1_SIZE2);
|
kfree(devpriv->counter);
|
}
|
comedi_legacy_detach(dev);
|
}
|
|
static struct comedi_driver das16m1_driver = {
|
.driver_name = "das16m1",
|
.module = THIS_MODULE,
|
.attach = das16m1_attach,
|
.detach = das16m1_detach,
|
};
|
module_comedi_driver(das16m1_driver);
|
|
MODULE_AUTHOR("Comedi https://www.comedi.org");
|
MODULE_DESCRIPTION("Comedi driver for CIO-DAS16/M1 ISA cards");
|
MODULE_LICENSE("GPL");
|
