/*
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* Copyright 2012-17 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "os_types.h"
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#include <drm/drm_dsc.h>
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#include "dscc_types.h"
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#include "rc_calc.h"
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static void copy_pps_fields(struct drm_dsc_config *to, const struct drm_dsc_config *from)
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{
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to->line_buf_depth = from->line_buf_depth;
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to->bits_per_component = from->bits_per_component;
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to->convert_rgb = from->convert_rgb;
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to->slice_width = from->slice_width;
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to->slice_height = from->slice_height;
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to->simple_422 = from->simple_422;
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to->native_422 = from->native_422;
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to->native_420 = from->native_420;
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to->pic_width = from->pic_width;
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to->pic_height = from->pic_height;
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to->rc_tgt_offset_high = from->rc_tgt_offset_high;
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to->rc_tgt_offset_low = from->rc_tgt_offset_low;
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to->bits_per_pixel = from->bits_per_pixel;
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to->rc_edge_factor = from->rc_edge_factor;
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to->rc_quant_incr_limit1 = from->rc_quant_incr_limit1;
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to->rc_quant_incr_limit0 = from->rc_quant_incr_limit0;
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to->initial_xmit_delay = from->initial_xmit_delay;
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to->initial_dec_delay = from->initial_dec_delay;
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to->block_pred_enable = from->block_pred_enable;
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to->first_line_bpg_offset = from->first_line_bpg_offset;
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to->second_line_bpg_offset = from->second_line_bpg_offset;
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to->initial_offset = from->initial_offset;
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memcpy(&to->rc_buf_thresh, &from->rc_buf_thresh, sizeof(from->rc_buf_thresh));
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memcpy(&to->rc_range_params, &from->rc_range_params, sizeof(from->rc_range_params));
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to->rc_model_size = from->rc_model_size;
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to->flatness_min_qp = from->flatness_min_qp;
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to->flatness_max_qp = from->flatness_max_qp;
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to->initial_scale_value = from->initial_scale_value;
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to->scale_decrement_interval = from->scale_decrement_interval;
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to->scale_increment_interval = from->scale_increment_interval;
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to->nfl_bpg_offset = from->nfl_bpg_offset;
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to->nsl_bpg_offset = from->nsl_bpg_offset;
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to->slice_bpg_offset = from->slice_bpg_offset;
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to->final_offset = from->final_offset;
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to->vbr_enable = from->vbr_enable;
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to->slice_chunk_size = from->slice_chunk_size;
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to->second_line_offset_adj = from->second_line_offset_adj;
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to->dsc_version_minor = from->dsc_version_minor;
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}
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static void copy_rc_to_cfg(struct drm_dsc_config *dsc_cfg, const struct rc_params *rc)
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{
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int i;
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dsc_cfg->rc_quant_incr_limit0 = rc->rc_quant_incr_limit0;
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dsc_cfg->rc_quant_incr_limit1 = rc->rc_quant_incr_limit1;
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dsc_cfg->initial_offset = rc->initial_fullness_offset;
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dsc_cfg->initial_xmit_delay = rc->initial_xmit_delay;
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dsc_cfg->first_line_bpg_offset = rc->first_line_bpg_offset;
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dsc_cfg->second_line_bpg_offset = rc->second_line_bpg_offset;
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dsc_cfg->flatness_min_qp = rc->flatness_min_qp;
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dsc_cfg->flatness_max_qp = rc->flatness_max_qp;
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for (i = 0; i < QP_SET_SIZE; ++i) {
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dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i];
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dsc_cfg->rc_range_params[i].range_max_qp = rc->qp_max[i];
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/* Truncate 8-bit signed value to 6-bit signed value */
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dsc_cfg->rc_range_params[i].range_bpg_offset = 0x3f & rc->ofs[i];
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}
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dsc_cfg->rc_model_size = rc->rc_model_size;
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dsc_cfg->rc_edge_factor = rc->rc_edge_factor;
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dsc_cfg->rc_tgt_offset_high = rc->rc_tgt_offset_hi;
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dsc_cfg->rc_tgt_offset_low = rc->rc_tgt_offset_lo;
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for (i = 0; i < QP_SET_SIZE - 1; ++i)
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dsc_cfg->rc_buf_thresh[i] = rc->rc_buf_thresh[i];
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}
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int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params)
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{
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int ret;
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struct rc_params rc;
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struct drm_dsc_config dsc_cfg;
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dsc_params->bytes_per_pixel = calc_dsc_bytes_per_pixel(pps);
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calc_rc_params(&rc, pps);
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dsc_params->pps = *pps;
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dsc_params->pps.initial_scale_value = 8 * rc.rc_model_size / (rc.rc_model_size - rc.initial_fullness_offset);
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copy_pps_fields(&dsc_cfg, &dsc_params->pps);
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copy_rc_to_cfg(&dsc_cfg, &rc);
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dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64;
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ret = drm_dsc_compute_rc_parameters(&dsc_cfg);
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copy_pps_fields(&dsc_params->pps, &dsc_cfg);
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dsc_params->rc_buffer_model_size = dsc_cfg.rc_bits;
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return ret;
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}
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