// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <drm/drm_mipi_dsi.h>
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#include <video_bridge.h>
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#include <asm/unaligned.h>
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#include <linux/media-bus-format.h>
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#include <power/regulator.h>
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#include "rockchip_bridge.h"
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#include "rockchip_display.h"
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#include "rockchip_panel.h"
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struct ser_reg_sequence {
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uint reg;
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uint def;
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};
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struct serdes_init_seq {
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struct ser_reg_sequence *reg_sequence;
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uint reg_seq_cnt;
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};
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struct bu18tl82_priv {
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struct udevice *dev;
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struct udevice *power_supply;
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struct gpio_desc enable_gpio;
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struct serdes_init_seq *serdes_init_seq;
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bool sel_mipi;
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};
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static void bu18tl82_bridge_reset(struct rockchip_bridge *bridge)
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{
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int ret = 0;
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struct udevice *dev = bridge->dev;
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struct udevice *bus = dev_get_parent(dev);
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ret = dm_i2c_reg_write(dev, 0x0011, 0x007f);
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if (ret < 0)
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printf("%s: failed to reset bu18tl82(%s) 0x11 ret=%d\n", __func__, bus->name, ret);
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ret = dm_i2c_reg_write(dev, 0x0012, 0x0003);
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if (ret < 0)
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printf("%s: failed to reset bu18tl82(%s) 0x12 ret=%d\n", __func__, bus->name, ret);
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mdelay(10);
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}
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static int bu18tl82_serdes_init_sequence_write(struct bu18tl82_priv *priv)
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{
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struct serdes_init_seq *serdes_init_seq = priv->serdes_init_seq;
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struct ser_reg_sequence *reg_sequence = serdes_init_seq->reg_sequence;
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uint cnt = serdes_init_seq->reg_seq_cnt;
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struct udevice *dev = priv->dev;
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uint i;
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int ret = 0;
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for (i = 0; i < cnt; i++) {
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ret = dm_i2c_reg_write(dev, reg_sequence[i].reg, reg_sequence[i].def);
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if (ret < 0) {
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dev_err(priv->dev, "failed to write reg: 0x%04x\n", reg_sequence[i].reg);
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return ret;
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}
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}
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return ret;
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}
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static void bu18tl82_serdes_init(struct rockchip_bridge *bridge)
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{
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struct udevice *dev = bridge->dev;
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struct bu18tl82_priv *priv = dev_get_priv(dev);
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uint i;
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int ret;
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for (i = 0; i < 10; i++) {
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ret = bu18tl82_serdes_init_sequence_write(priv);
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if (ret < 0) {
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mdelay(100);
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continue;
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}
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break;
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}
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}
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static void bu18tl82_bridge_enable(struct rockchip_bridge *bridge)
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{
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}
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static void bu18tl82_bridge_disable(struct rockchip_bridge *bridge)
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{
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}
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static void bu18tl82_bridge_init(struct rockchip_bridge *bridge)
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{
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struct udevice *dev = bridge->dev;
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struct bu18tl82_priv *priv = dev_get_priv(dev);
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if (priv->power_supply)
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regulator_set_enable(priv->power_supply, true);
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if (dm_gpio_is_valid(&priv->enable_gpio))
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dm_gpio_set_value(&priv->enable_gpio, 1);
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mdelay(5);
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video_bridge_set_active(priv->dev, true);
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bu18tl82_serdes_init(bridge);
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}
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static const struct rockchip_bridge_funcs bu18tl82_bridge_funcs = {
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.enable = bu18tl82_bridge_enable,
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.disable = bu18tl82_bridge_disable,
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};
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static int bu18tl82_parse_init_seq(struct udevice *dev, const u16 *data,
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int length, struct serdes_init_seq *seq)
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{
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struct ser_reg_sequence *reg_sequence;
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u16 *buf, *d;
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unsigned int i, cnt;
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int ret;
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if (!seq)
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return -EINVAL;
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buf = calloc(1, length);
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if (!buf)
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return -ENOMEM;
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memcpy(buf, data, length);
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d = buf;
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cnt = length / 4;
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seq->reg_seq_cnt = cnt;
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seq->reg_sequence = calloc(cnt, sizeof(struct ser_reg_sequence));
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if (!seq->reg_sequence) {
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ret = -ENOMEM;
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goto free_buf;
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}
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for (i = 0; i < cnt; i++) {
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reg_sequence = &seq->reg_sequence[i];
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reg_sequence->reg = get_unaligned_be16(&d[0]);
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reg_sequence->def = get_unaligned_be16(&d[1]);
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d += 2;
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}
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return 0;
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free_buf:
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free(buf);
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return ret;
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}
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static int bu18tl82_get_init_seq(struct bu18tl82_priv *priv)
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{
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const void *data = NULL;
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int len, err;
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data = dev_read_prop(priv->dev, "serdes-init-sequence", &len);
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if (!data) {
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printf("failed to get serdes-init-sequence\n");
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return -EINVAL;
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}
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priv->serdes_init_seq = calloc(1, sizeof(*priv->serdes_init_seq));
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if (!priv->serdes_init_seq)
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return -ENOMEM;
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err = bu18tl82_parse_init_seq(priv->dev, data, len, priv->serdes_init_seq);
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if (err) {
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printf("failed to parse serdes-init-sequence\n");
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goto free_init_seq;
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}
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return 0;
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free_init_seq:
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free(priv->serdes_init_seq);
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return err;
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}
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static int bu18tl82_probe(struct udevice *dev)
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{
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struct bu18tl82_priv *priv = dev_get_priv(dev);
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struct rockchip_bridge *bridge;
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int ret;
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ret = i2c_set_chip_offset_len(dev, 2);
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if (ret)
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return ret;
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priv->dev = dev;
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ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
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"power-supply", &priv->power_supply);
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if (ret && ret != -ENOENT) {
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printf("%s: Cannot get power supply: %d\n", __func__, ret);
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return ret;
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}
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ret = gpio_request_by_name(dev, "enable-gpios", 0,
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&priv->enable_gpio, GPIOD_IS_OUT);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "%s: failed to get enable GPIO: %d\n", __func__, ret);
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return ret;
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}
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priv->sel_mipi = dev_read_bool(dev, "sel-mipi");
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if (priv->sel_mipi) {
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struct mipi_dsi_device *device = dev_get_platdata(dev);
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device->dev = dev;
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device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4);
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device->format = dev_read_u32_default(dev, "dsi,format",
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MIPI_DSI_FMT_RGB888);
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device->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_VIDEO_HBP | MIPI_DSI_MODE_LPM |
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MIPI_DSI_MODE_EOT_PACKET;
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device->channel = dev_read_u32_default(dev, "reg", 0);
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}
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bridge = calloc(1, sizeof(*bridge));
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if (!bridge)
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return -ENOMEM;
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ret = bu18tl82_get_init_seq(priv);
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if (ret)
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goto free_bridge;
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dev->driver_data = (ulong)bridge;
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bridge->dev = dev;
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bridge->funcs = &bu18tl82_bridge_funcs;
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bu18tl82_bridge_reset(bridge);
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bu18tl82_bridge_init(bridge);
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return 0;
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free_bridge:
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free(bridge);
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return ret;
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}
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static const struct udevice_id bu18tl82_of_match[] = {
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{ .compatible = "rohm,bu18tl82", },
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{}
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};
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U_BOOT_DRIVER(bu18tl82) = {
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.name = "bu18tl82",
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.id = UCLASS_VIDEO_BRIDGE,
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.of_match = bu18tl82_of_match,
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.probe = bu18tl82_probe,
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.priv_auto_alloc_size = sizeof(struct bu18tl82_priv),
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.platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
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};
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