// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <boot_rkimg.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <video_bridge.h>
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#include <asm/io.h>
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#include <dm/device.h>
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#include <dm/device-internal.h>
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#include <linux/media-bus-format.h>
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#include "rockchip_bridge.h"
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#include "rockchip_display.h"
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#include "rockchip_panel.h"
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#include "rk1000.h"
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#define TVE_POWCR 0x03
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#define TVE_OFF 0X07
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#define TVE_ON 0x03
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struct rk1000_tve {
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struct udevice *dev;
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struct rk1000_ctl rk1000_ctl;
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};
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enum {
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CVBS_NTSC = 0,
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CVBS_PAL,
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};
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int rk1000_tve_i2c_write(struct rk1000_tve *rk1000_tve, u8 reg, u8 val)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_tve->dev);
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struct i2c_msg msg;
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u8 buf[2];
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int ret;
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buf[0] = reg;
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buf[1] = val;
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msg.addr = chip->chip_addr;
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msg.flags = 0;
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msg.len = 2;
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msg.buf = buf;
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ret = dm_i2c_xfer(rk1000_tve->dev, &msg, 1);
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if (ret) {
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dev_err(rk1000_tve->dev,
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"rk1000 tve i2c write failed: %d\n", ret);
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return ret;
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}
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return 0;
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}
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int rk1000_tve_i2c_read(struct rk1000_tve *rk1000_tve, u8 reg, u8 *val)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_tve->dev);
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u8 data;
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struct i2c_msg msg[] = {
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{
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.addr = chip->chip_addr,
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.flags = 0,
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.buf = (u8 *)®,
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.len = 1,
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}, {
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.addr = chip->chip_addr,
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.flags = I2C_M_RD,
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.buf = (u8 *)&data,
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.len = 1,
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}
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};
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int ret;
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ret = dm_i2c_xfer(rk1000_tve->dev, msg, 2);
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if (ret) {
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dev_err(rk1000_tve->dev,
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"rk1000 tve i2c read failed: %d\n", ret);
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return ret;
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}
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*val = data;
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return 0;
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}
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static int rk1000_tv_write_block(struct rk1000_tve *rk1000_tve,
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u8 reg, const u8 *buf, u8 len)
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{
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int i, ret;
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for (i = 0; i < len; i++) {
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ret = rk1000_tve_i2c_write(rk1000_tve, reg + i, buf[i]);
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if (ret)
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break;
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}
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return ret;
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}
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static int rk1000_tve_probe(struct udevice *dev)
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{
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struct rk1000_tve *rk1000_tve = dev_get_priv(dev);
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struct rockchip_bridge *bridge =
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(struct rockchip_bridge *)dev_get_driver_data(dev);
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int ret;
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rk1000_tve->dev = dev;
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ret = uclass_get_device_by_name(UCLASS_I2C_GENERIC,
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"rk1000-ctl@40",
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&rk1000_tve->rk1000_ctl.dev);
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if (ret)
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return ret;
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bridge->dev = dev;
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return 0;
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}
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static void rk1000_tve_bridge_enable(struct rockchip_bridge *bridge)
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{
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u8 tv_encoder_regs_pal[] = {0x06, 0x00, 0x00, 0x03, 0x00, 0x00};
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u8 tv_encoder_control_regs_pal[] = {0x41, 0x01};
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u8 tv_encoder_regs_ntsc[] = {0x00, 0x00, 0x00, 0x03, 0x00, 0x00};
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u8 tv_encoder_control_regs_ntsc[] = {0x43, 0x01};
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char data[4] = {0x88, 0x00, 0x22, 0x00};
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struct rk1000_tve *rk1000_tve = dev_get_priv(bridge->dev);
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struct connector_state *conn_state = &bridge->state->conn_state;
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struct drm_display_mode *mode = &conn_state->mode;
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struct rk1000_ctl *rk1000_ctl = &rk1000_tve->rk1000_ctl;
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rk1000_ctl_write_block(rk1000_ctl, 0, (u8 *)data, 4);
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/* rk1000 power down output dac */
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data[0] = 0x07;
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rk1000_tv_write_block(rk1000_tve, 0x03, (u8 *)data, 1);
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if (mode->vdisplay == 576) {
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rk1000_tv_write_block(rk1000_tve, 0, tv_encoder_regs_pal,
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sizeof(tv_encoder_regs_pal));
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rk1000_ctl_write_block(rk1000_ctl, 3,
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tv_encoder_control_regs_pal,
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sizeof(tv_encoder_control_regs_pal));
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} else {
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rk1000_tv_write_block(rk1000_tve, 0, tv_encoder_regs_ntsc,
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sizeof(tv_encoder_regs_ntsc));
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rk1000_ctl_write_block(rk1000_ctl, 3,
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tv_encoder_control_regs_ntsc,
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sizeof(tv_encoder_control_regs_ntsc));
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}
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}
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static void rk1000_tve_bridge_disable(struct rockchip_bridge *bridge)
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{
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struct rk1000_tve *rk1000_tve = dev_get_priv(bridge->dev);
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char data[1] = {0x07};
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/* rk1000 power down output dac */
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rk1000_tv_write_block(rk1000_tve, 0x03, (u8 *)data, 1);
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}
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static void drm_rk1000_select_output(struct overscan *overscan,
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struct drm_display_mode *mode)
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{
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char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
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struct base_screen_info *screen_info = NULL;
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struct base_disp_info base_parameter;
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struct blk_desc *dev_desc;
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const struct base_overscan *scan;
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disk_partition_t part_info;
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int ret, i, screen_size;
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int max_scan = 100;
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int min_scan = 51;
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overscan->left_margin = max_scan;
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overscan->right_margin = max_scan;
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overscan->top_margin = max_scan;
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overscan->bottom_margin = max_scan;
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mode->hdisplay = 720;
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mode->hsync_start = 732;
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mode->hsync_end = 738;
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mode->htotal = 864;
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mode->vdisplay = 576;
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mode->vsync_start = 582;
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mode->vsync_end = 588;
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mode->vtotal = 625;
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mode->clock = 27000;
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mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC;
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dev_desc = rockchip_get_bootdev();
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if (!dev_desc) {
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printf("%s: Could not find device\n", __func__);
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return;
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}
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if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
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printf("Could not find baseparameter partition\n");
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return;
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}
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ret = blk_dread(dev_desc, part_info.start, 1,
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(void *)baseparameter_buf);
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if (ret < 0) {
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printf("read baseparameter failed\n");
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return;
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}
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memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
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scan = &base_parameter.scan;
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screen_size = sizeof(base_parameter.screen_list) /
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sizeof(base_parameter.screen_list[0]);
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for (i = 0; i < screen_size; i++) {
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if (base_parameter.screen_list[i].type ==
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DRM_MODE_CONNECTOR_TV) {
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screen_info = &base_parameter.screen_list[i];
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break;
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}
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}
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if (scan->leftscale < min_scan && scan->leftscale > 0)
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overscan->left_margin = min_scan;
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else if (scan->leftscale < max_scan)
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overscan->left_margin = scan->leftscale;
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if (scan->rightscale < min_scan && scan->rightscale > 0)
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overscan->right_margin = min_scan;
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else if (scan->rightscale < max_scan)
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overscan->right_margin = scan->rightscale;
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if (scan->topscale < min_scan && scan->topscale > 0)
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overscan->top_margin = min_scan;
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else if (scan->topscale < max_scan)
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overscan->top_margin = scan->topscale;
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if (scan->bottomscale < min_scan && scan->bottomscale > 0)
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overscan->bottom_margin = min_scan;
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else if (scan->bottomscale < max_scan)
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overscan->bottom_margin = scan->bottomscale;
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if (screen_info &&
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(screen_info->mode.hdisplay == 720 &&
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screen_info->mode.hsync_end == 742 &&
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screen_info->mode.vdisplay == 480)) {
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mode->hdisplay = 720;
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mode->hsync_start = 736;
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mode->hsync_end = 742;
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mode->htotal = 858;
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mode->vdisplay = 480;
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mode->vsync_start = 494;
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mode->vsync_end = 500;
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mode->vtotal = 525;
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mode->clock = 27000;
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} else {
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mode->hdisplay = 720;
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mode->hsync_start = 732;
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mode->hsync_end = 738;
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mode->htotal = 864;
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mode->vdisplay = 576;
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mode->vsync_start = 582;
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mode->vsync_end = 588;
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mode->vtotal = 625;
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mode->clock = 27000;
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}
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}
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static int rk1000_tve_get_timing(struct udevice *dev)
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{
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struct rockchip_bridge *bridge =
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(struct rockchip_bridge *)dev_get_driver_data(dev);
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struct connector_state *conn_state = &bridge->state->conn_state;
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struct drm_display_mode *mode = &conn_state->mode;
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struct overscan *overscan = &conn_state->overscan;
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drm_rk1000_select_output(overscan, mode);
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return 0;
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}
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static const struct rockchip_bridge_funcs rk1000_tve_bridge_funcs = {
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.enable = rk1000_tve_bridge_enable,
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.disable = rk1000_tve_bridge_disable,
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};
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static struct rockchip_bridge rk1000_tve_driver_data = {
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.funcs = &rk1000_tve_bridge_funcs,
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};
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struct video_bridge_ops rk1000_tve_ops = {
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.get_timing = rk1000_tve_get_timing,
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};
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static const struct udevice_id rk1000_tve_ids[] = {
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{
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.compatible = "rockchip,rk1000-tve",
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.data = (ulong)&rk1000_tve_driver_data,
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},
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{ }
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};
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U_BOOT_DRIVER(rk1000_tve) = {
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.name = "rk1000_tve",
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.id = UCLASS_VIDEO_BRIDGE,
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.of_match = rk1000_tve_ids,
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.ops = &rk1000_tve_ops,
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.probe = rk1000_tve_probe,
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.priv_auto_alloc_size = sizeof(struct rk1000_tve),
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};
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