// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
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*/
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#include <common.h>
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#include <dm.h>
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#include <ram.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_px30.h>
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#include <asm/arch/grf_rv1108.h>
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#include <asm/arch/grf_rk1808.h>
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#include <asm/arch/grf_rk3036.h>
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#include <asm/arch/grf_rk3308.h>
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#include <asm/arch/rockchip_dmc.h>
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#include <asm/arch/sdram.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_TPL_BUILD
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struct dram_info {
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struct ram_info info;
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};
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static int dmc_probe(struct udevice *dev)
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{
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int ret = 0;
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struct dram_info *priv = dev_get_priv(dev);
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if (!(gd->flags & GD_FLG_RELOC)) {
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#if defined(CONFIG_ROCKCHIP_RV1108)
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struct rv1108_grf *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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priv->info.size =
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rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
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#elif defined(CONFIG_ROCKCHIP_RK3036)
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struct rk3036_grf *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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priv->info.size =
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rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
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#elif defined(CONFIG_ROCKCHIP_RK3308)
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struct rk3308_grf *grf =
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syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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priv->info.size =
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rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
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#elif defined(CONFIG_ROCKCHIP_PX30)
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struct px30_pmugrf *pmugrf =
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syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
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priv->info.size =
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rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
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#elif defined(CONFIG_ROCKCHIP_RK1808)
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struct rk1808_pmugrf *pmugrf =
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syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
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priv->info.size =
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rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
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#else
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#error chip error
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#endif
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priv->info.base = CONFIG_SYS_SDRAM_BASE;
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} else {
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#if defined(CONFIG_ROCKCHIP_PX30)
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC)
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ret = rockchip_dmcfreq_probe(dev);
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#endif
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#endif
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}
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return ret;
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}
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static int dmc_get_info(struct udevice *dev, struct ram_info *info)
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{
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struct dram_info *priv = dev_get_priv(dev);
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*info = priv->info;
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return 0;
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}
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static struct ram_ops dmc_ops = {
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.get_info = dmc_get_info,
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};
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static const struct udevice_id dmc_ids[] = {
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#if defined(CONFIG_ROCKCHIP_RV1108)
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{ .compatible = "rockchip,rv1108-dmc" },
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#elif defined(CONFIG_ROCKCHIP_RK3036)
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{ .compatible = "rockchip,rk3036-dmc" },
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#elif defined(CONFIG_ROCKCHIP_RK3308)
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{ .compatible = "rockchip,rk3308-dmc" },
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#elif defined(CONFIG_ROCKCHIP_PX30)
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{ .compatible = "rockchip,px30-dmc" },
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#elif defined(CONFIG_ROCKCHIP_RK1808)
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{ .compatible = "rockchip,rk1808-dmc" },
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#endif
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{ }
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};
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U_BOOT_DRIVER(dmc_tiny) = {
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.name = "rockchip_dmc",
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.id = UCLASS_RAM,
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.of_match = dmc_ids,
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.ops = &dmc_ops,
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.probe = dmc_probe,
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.priv_auto_alloc_size = sizeof(struct dram_info),
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};
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#endif
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