/*******************************************************************************
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*
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*******************************************************************************/
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#include "i40iw_osdep.h"
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#include "i40iw_register.h"
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#include "i40iw_status.h"
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#include "i40iw_hmc.h"
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#include "i40iw_d.h"
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#include "i40iw_type.h"
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#include "i40iw_p.h"
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#include "i40iw_vf.h"
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/**
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* i40iw_manage_vf_pble_bp - manage vf pble
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* @cqp: cqp for cqp' sq wqe
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* @info: pble info
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* @scratch: pointer for completion
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* @post_sq: to post and ring
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*/
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enum i40iw_status_code i40iw_manage_vf_pble_bp(struct i40iw_sc_cqp *cqp,
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struct i40iw_manage_vf_pble_info *info,
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u64 scratch,
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bool post_sq)
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{
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u64 *wqe;
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u64 temp, header, pd_pl_pba = 0;
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wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
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if (!wqe)
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return I40IW_ERR_RING_FULL;
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temp = LS_64(info->pd_entry_cnt, I40IW_CQPSQ_MVPBP_PD_ENTRY_CNT) |
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LS_64(info->first_pd_index, I40IW_CQPSQ_MVPBP_FIRST_PD_INX) |
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LS_64(info->sd_index, I40IW_CQPSQ_MVPBP_SD_INX);
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set_64bit_val(wqe, 16, temp);
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header = LS_64((info->inv_pd_ent ? 1 : 0), I40IW_CQPSQ_MVPBP_INV_PD_ENT) |
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LS_64(I40IW_CQP_OP_MANAGE_VF_PBLE_BP, I40IW_CQPSQ_OPCODE) |
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LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID);
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set_64bit_val(wqe, 24, header);
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pd_pl_pba = LS_64(info->pd_pl_pba >> 3, I40IW_CQPSQ_MVPBP_PD_PLPBA);
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set_64bit_val(wqe, 32, pd_pl_pba);
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i40iw_debug_buf(cqp->dev, I40IW_DEBUG_WQE, "MANAGE VF_PBLE_BP WQE", wqe, I40IW_CQP_WQE_SIZE * 8);
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if (post_sq)
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i40iw_sc_cqp_post_sq(cqp);
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return 0;
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}
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const struct i40iw_vf_cqp_ops iw_vf_cqp_ops = {
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i40iw_manage_vf_pble_bp
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};
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