/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/bitsperlong.h>
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#include <asm/kvm_vcpu_regs.h>
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#include <asm/nospec-branch.h>
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#define WORD_SIZE (BITS_PER_LONG / 8)
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/* Intentionally omit RAX as it's context switched by hardware */
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#define VCPU_RCX __VCPU_REGS_RCX * WORD_SIZE
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#define VCPU_RDX __VCPU_REGS_RDX * WORD_SIZE
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#define VCPU_RBX __VCPU_REGS_RBX * WORD_SIZE
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/* Intentionally omit RSP as it's context switched by hardware */
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#define VCPU_RBP __VCPU_REGS_RBP * WORD_SIZE
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#define VCPU_RSI __VCPU_REGS_RSI * WORD_SIZE
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#define VCPU_RDI __VCPU_REGS_RDI * WORD_SIZE
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#ifdef CONFIG_X86_64
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#define VCPU_R8 __VCPU_REGS_R8 * WORD_SIZE
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#define VCPU_R9 __VCPU_REGS_R9 * WORD_SIZE
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#define VCPU_R10 __VCPU_REGS_R10 * WORD_SIZE
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#define VCPU_R11 __VCPU_REGS_R11 * WORD_SIZE
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#define VCPU_R12 __VCPU_REGS_R12 * WORD_SIZE
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#define VCPU_R13 __VCPU_REGS_R13 * WORD_SIZE
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#define VCPU_R14 __VCPU_REGS_R14 * WORD_SIZE
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#define VCPU_R15 __VCPU_REGS_R15 * WORD_SIZE
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#endif
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.section .noinstr.text, "ax"
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/**
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* __svm_vcpu_run - Run a vCPU via a transition to SVM guest mode
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* @vmcb_pa: unsigned long
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* @regs: unsigned long * (to guest registers)
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*/
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SYM_FUNC_START(__svm_vcpu_run)
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push %_ASM_BP
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#ifdef CONFIG_X86_64
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push %r15
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push %r14
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push %r13
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push %r12
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#else
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push %edi
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push %esi
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#endif
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push %_ASM_BX
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/* Save @regs. */
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push %_ASM_ARG2
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/* Save @vmcb. */
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push %_ASM_ARG1
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/* Move @regs to RAX. */
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mov %_ASM_ARG2, %_ASM_AX
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/* Load guest registers. */
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mov VCPU_RCX(%_ASM_AX), %_ASM_CX
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mov VCPU_RDX(%_ASM_AX), %_ASM_DX
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mov VCPU_RBX(%_ASM_AX), %_ASM_BX
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mov VCPU_RBP(%_ASM_AX), %_ASM_BP
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mov VCPU_RSI(%_ASM_AX), %_ASM_SI
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mov VCPU_RDI(%_ASM_AX), %_ASM_DI
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#ifdef CONFIG_X86_64
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mov VCPU_R8 (%_ASM_AX), %r8
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mov VCPU_R9 (%_ASM_AX), %r9
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mov VCPU_R10(%_ASM_AX), %r10
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mov VCPU_R11(%_ASM_AX), %r11
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mov VCPU_R12(%_ASM_AX), %r12
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mov VCPU_R13(%_ASM_AX), %r13
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mov VCPU_R14(%_ASM_AX), %r14
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mov VCPU_R15(%_ASM_AX), %r15
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#endif
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/* "POP" @vmcb to RAX. */
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pop %_ASM_AX
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/* Enter guest mode */
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sti
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1: vmload %_ASM_AX
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jmp 3f
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2: cmpb $0, kvm_rebooting
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jne 3f
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ud2
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_ASM_EXTABLE(1b, 2b)
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3: vmrun %_ASM_AX
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jmp 5f
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4: cmpb $0, kvm_rebooting
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jne 5f
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ud2
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_ASM_EXTABLE(3b, 4b)
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5: vmsave %_ASM_AX
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jmp 7f
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6: cmpb $0, kvm_rebooting
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jne 7f
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ud2
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_ASM_EXTABLE(5b, 6b)
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7:
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cli
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#ifdef CONFIG_RETPOLINE
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/* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */
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FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE
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#endif
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/* "POP" @regs to RAX. */
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pop %_ASM_AX
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/* Save all guest registers. */
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mov %_ASM_CX, VCPU_RCX(%_ASM_AX)
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mov %_ASM_DX, VCPU_RDX(%_ASM_AX)
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mov %_ASM_BX, VCPU_RBX(%_ASM_AX)
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mov %_ASM_BP, VCPU_RBP(%_ASM_AX)
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mov %_ASM_SI, VCPU_RSI(%_ASM_AX)
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mov %_ASM_DI, VCPU_RDI(%_ASM_AX)
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#ifdef CONFIG_X86_64
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mov %r8, VCPU_R8 (%_ASM_AX)
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mov %r9, VCPU_R9 (%_ASM_AX)
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mov %r10, VCPU_R10(%_ASM_AX)
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mov %r11, VCPU_R11(%_ASM_AX)
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mov %r12, VCPU_R12(%_ASM_AX)
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mov %r13, VCPU_R13(%_ASM_AX)
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mov %r14, VCPU_R14(%_ASM_AX)
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mov %r15, VCPU_R15(%_ASM_AX)
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#endif
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/*
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* Mitigate RETBleed for AMD/Hygon Zen uarch. RET should be
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* untrained as soon as we exit the VM and are back to the
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* kernel. This should be done before re-enabling interrupts
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* because interrupt handlers won't sanitize 'ret' if the return is
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* from the kernel.
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*/
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UNTRAIN_RET
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/*
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* Clear all general purpose registers except RSP and RAX to prevent
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* speculative use of the guest's values, even those that are reloaded
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* via the stack. In theory, an L1 cache miss when restoring registers
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* could lead to speculative execution with the guest's values.
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* Zeroing XORs are dirt cheap, i.e. the extra paranoia is essentially
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* free. RSP and RAX are exempt as they are restored by hardware
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* during VM-Exit.
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*/
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xor %ecx, %ecx
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xor %edx, %edx
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xor %ebx, %ebx
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xor %ebp, %ebp
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xor %esi, %esi
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xor %edi, %edi
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#ifdef CONFIG_X86_64
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xor %r8d, %r8d
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xor %r9d, %r9d
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xor %r10d, %r10d
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xor %r11d, %r11d
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xor %r12d, %r12d
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xor %r13d, %r13d
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xor %r14d, %r14d
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xor %r15d, %r15d
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#endif
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pop %_ASM_BX
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#ifdef CONFIG_X86_64
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pop %r12
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pop %r13
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pop %r14
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pop %r15
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#else
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pop %esi
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pop %edi
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#endif
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pop %_ASM_BP
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RET
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SYM_FUNC_END(__svm_vcpu_run)
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