// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <max96755f.h>
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#include <dm/of_access.h>
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#include <dm/ofnode.h>
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static int max96755f_select(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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struct max96755f_priv *priv = dev_get_priv(mux);
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int link_cfg;
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dm_i2c_reg_clrset(priv->dev, 0x0001, DIS_REM_CC,
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FIELD_PREP(DIS_REM_CC, 0));
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if (!priv->split_mode)
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return 0;
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link_cfg = dm_i2c_reg_read(priv->dev, 0x0010);
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if ((link_cfg & LINK_CFG) == SPLITTER_MODE)
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return 0;
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if (channel == 0 && (link_cfg & LINK_CFG) != LINKA) {
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dm_i2c_reg_clrset(priv->dev, 0x0010,
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RESET_ONESHOT | AUTO_LINK | LINK_CFG,
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FIELD_PREP(RESET_ONESHOT, 1) |
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FIELD_PREP(AUTO_LINK, 0) |
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FIELD_PREP(LINK_CFG, LINKA));
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mdelay(50);
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} else if (channel == 1 && (link_cfg & LINK_CFG) != LINKB) {
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dm_i2c_reg_clrset(priv->dev, 0x0010,
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RESET_ONESHOT | AUTO_LINK | LINK_CFG,
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FIELD_PREP(RESET_ONESHOT, 1) |
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FIELD_PREP(AUTO_LINK, 0) |
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FIELD_PREP(LINK_CFG, LINKB));
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mdelay(50);
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}
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return 0;
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}
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static int max96755f_deselect(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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struct max96755f_priv *priv = dev_get_priv(mux);
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dm_i2c_reg_clrset(priv->dev, 0x0001, DIS_REM_CC,
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FIELD_PREP(DIS_REM_CC, 1));
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return 0;
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}
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static const struct i2c_mux_ops max96755f_ops = {
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.select = max96755f_select,
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.deselect = max96755f_deselect,
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};
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static int max96755f_power_on(struct max96755f_priv *priv)
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{
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int ret;
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if (dm_gpio_is_valid(&priv->enable_gpio)) {
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dm_gpio_set_value(&priv->enable_gpio, 1);
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mdelay(100);
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}
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ret = dm_i2c_reg_clrset(priv->dev, 0x0010, RESET_ALL,
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FIELD_PREP(RESET_ALL, 1));
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if (ret < 0)
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return ret;
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mdelay(100);
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dm_i2c_reg_clrset(priv->dev, 0x0001, DIS_REM_CC,
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FIELD_PREP(DIS_REM_CC, 1));
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return 0;
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}
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static int max96755f_probe(struct udevice *dev)
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{
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struct max96755f_priv *priv = dev_get_priv(dev);
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ofnode child;
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u8 nr = 0;
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int ret;
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ret = i2c_set_chip_offset_len(dev, 2);
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if (ret)
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return ret;
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priv->dev = dev;
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ret = gpio_request_by_name(dev, "enable-gpios", 0,
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&priv->enable_gpio, GPIOD_IS_OUT);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "%s: failed to get enable GPIO: %d\n", __func__, ret);
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return ret;
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}
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ret = max96755f_power_on(priv);
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if (ret) {
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dev_err(dev, "%s: failed to power on: %d\n", __func__, ret);
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return ret;
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}
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ofnode_for_each_subnode(child, dev_ofnode(dev)) {
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if (!ofnode_is_available(child) ||
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!of_find_property(ofnode_to_np(child), "reg", NULL))
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continue;
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nr++;
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}
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if (nr == 2)
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priv->split_mode = true;
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return 0;
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}
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static const struct udevice_id max96755f_of_match[] = {
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{ .compatible = "maxim,max96755f" },
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{}
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};
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U_BOOT_DRIVER(max96755f) = {
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.name = "max96755f",
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.id = UCLASS_I2C_MUX,
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.of_match = max96755f_of_match,
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.bind = dm_scan_fdt_dev,
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.probe = max96755f_probe,
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.ops = &max96755f_ops,
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.priv_auto_alloc_size = sizeof(struct max96755f_priv),
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};
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