/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016 Linaro Limited.
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* Copyright (c) 2014-2016 Hisilicon Limited.
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*/
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#ifndef __KIRIN_DRM_DRV_H__
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#define __KIRIN_DRM_DRV_H__
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#define to_kirin_crtc(crtc) \
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container_of(crtc, struct kirin_crtc, base)
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#define to_kirin_plane(plane) \
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container_of(plane, struct kirin_plane, base)
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/* kirin-format translate table */
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struct kirin_format {
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u32 pixel_format;
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u32 hw_format;
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};
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struct kirin_crtc {
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struct drm_crtc base;
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void *hw_ctx;
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bool enable;
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};
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struct kirin_plane {
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struct drm_plane base;
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void *hw_ctx;
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u32 ch;
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};
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/* display controller init/cleanup ops */
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struct kirin_drm_data {
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const u32 *channel_formats;
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u32 channel_formats_cnt;
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int config_max_width;
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int config_max_height;
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u32 num_planes;
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u32 prim_plane;
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struct drm_driver *driver;
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const struct drm_crtc_helper_funcs *crtc_helper_funcs;
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const struct drm_crtc_funcs *crtc_funcs;
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const struct drm_plane_helper_funcs *plane_helper_funcs;
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const struct drm_plane_funcs *plane_funcs;
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const struct drm_mode_config_funcs *mode_config_funcs;
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void *(*alloc_hw_ctx)(struct platform_device *pdev,
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struct drm_crtc *crtc);
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void (*cleanup_hw_ctx)(void *hw_ctx);
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};
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#ifdef CONFIG_DRM_HISI_KIRIN620
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extern struct kirin_drm_data ade_driver_data;
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#endif
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#ifdef CONFIG_DRM_HISI_KIRIN960
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extern const struct kirin_drm_data dpe_driver_data;
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#endif
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#endif /* __KIRIN_DRM_DRV_H__ */
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