/*
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*
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* (C) COPYRIGHT 2012-2016 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* A copy of the licence is included with the program, and can also be obtained
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* from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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/*
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* Cache Policy API.
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*/
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#include "mali_kbase_cache_policy.h"
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/*
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* The output flags should be a combination of the following values:
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* KBASE_REG_CPU_CACHED: CPU cache should be enabled.
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*/
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u32 kbase_cache_enabled(u32 flags, u32 nr_pages)
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{
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u32 cache_flags = 0;
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CSTD_UNUSED(nr_pages);
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if (flags & BASE_MEM_CACHED_CPU)
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cache_flags |= KBASE_REG_CPU_CACHED;
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return cache_flags;
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}
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void kbase_sync_single_for_device(struct kbase_device *kbdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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/* Check if kernel is using coherency with GPU */
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#ifdef CONFIG_MALI_COH_KERN
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if (kbdev->system_coherency == COHERENCY_ACE)
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return;
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#endif /* CONFIG_MALI_COH_KERN */
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dma_sync_single_for_device(kbdev->dev, handle, size, dir);
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}
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void kbase_sync_single_for_cpu(struct kbase_device *kbdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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/* Check if kernel is using coherency with GPU */
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#ifdef CONFIG_MALI_COH_KERN
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if (kbdev->system_coherency == COHERENCY_ACE)
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return;
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#endif /* CONFIG_MALI_COH_KERN */
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dma_sync_single_for_cpu(kbdev->dev, handle, size, dir);
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}
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