Work_92105 from Work Microwave is an LPC3250- based board with the
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following features:
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- 64MB SDR DRAM
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- 1 GB SLC NAND, managed through MLC controller.
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- Ethernet
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- Ethernet + PHY SMSC8710
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- I2C:
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- EEPROM (24M01-compatible)
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- RTC (DS1374-compatible)
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- Temperature sensor (DS620)
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- DACs (2 x MAX518)
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- SPI (through SSP interface)
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- Port expander MAX6957
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- LCD display (HD44780-compatible), controlled
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through the port expander and DACs
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Standard SPL and U-Boot binaries
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--------------------------------
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The default 'make' (or the 'make all') command will produce the
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following files:
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1. spl/u-boot-spl.bin SPL, intended to run from SRAM at address 0.
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This file can be loaded in SRAM through a JTAG
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debugger or through the LPC32XX Service Boot
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mechanism.
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2. u-boot.bin The raw U-Boot image, which can be loaded in
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DDR through a JTAG debugger (for instance by
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breaking SPL after DDR init), or by a running
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U-Boot through e.g. 'loady' or 'tftp' and then
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executed with 'go'.
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3. u-boot.img A U-Boot image with a mkimage header prepended.
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SPL assumes (even when loaded through JTAG or
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Service Boot) that such an image will be found
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at offset 0x00040000 in NAND.
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NAND cold-boot binaries
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-----------------------
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The board can boot entirely from power-on with only SPL and U-Boot in
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NAND. The LPC32XX-specific 'make lpc32xx-full.bin' command will produce
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(in addition to spl/u-boot-spl.bin and u-boot.img if they were not made
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already) the following files:
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4. lpc32xx-spl.img spl/u-boot-spl.bin, with a LPC32XX boot header
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prepended. This header is required for the ROM
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code to load SPL into SRAM and branch into it.
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The content of this file is expected to reside
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in NAND at addresses 0x00000000 and 0x00020000
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(two copies).
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5. lpc32xx-boot-0.bin lpc32xx-spl.img, padded with 0xFF bytes to a
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size of 0x20000 bytes. This file covers exactly
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the reserved area for the first bootloader copy
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in NAND.
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6. lpc32xx-boot-1.bin Same as lpc32xx-boot-0.bin. This is intended to
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be used as the second bootloader copy.
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7. lpc32xx-full.bin lpc32xx-boot-0.bin, lpc32xx-boot-1.bin and
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u-boot.img concatenated. This file represents
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the content of whole bootloader as present in
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NAND at offset 00x00000000.
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Flashing instructions
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---------------------
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The following assumes a working U-Boot on the target, with the ability
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to load files into DDR.
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To update the whole bootloader:
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nand erase 0x00000000 0x80000
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(load lpc32xx-full.bin at location $loadaddr)
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nand write $loadaddr 0x00000000 $filesize
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To update SPL only (note the double nand write) :
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nand erase 0x00000000 0x40000
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(load lpc32xx-spl.img or lpc32xx-boot-N.bin at location $loadaddr)
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nand write $loadaddr 0x00000000 $filesize
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nand write $loadaddr 0x00020000 $filesize
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To update U-Boot only:
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nand erase 0x00040000 0x40000
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(load u-boot.img at location $loadaddr)
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nand write $loadaddr 0x00040000 $filesize
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