/*
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* Copyright 2017 Toradex AG
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*
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* FSL DCU platform driver
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/crm_regs.h>
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#include <asm/io.h>
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#include <common.h>
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#include <fsl_dcu_fb.h>
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#include "div64.h"
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DECLARE_GLOBAL_DATA_PTR;
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unsigned int dcu_set_pixel_clock(unsigned int pixclock)
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{
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struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
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unsigned long long div;
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clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL);
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clrsetbits_le32(&ccm->cscdr3,
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CCM_CSCDR3_DCU0_DIV_MASK | CCM_CSCDR3_DCU0_EN,
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CCM_CSCDR3_DCU0_DIV(0) | CCM_CSCDR3_DCU0_EN);
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div = (unsigned long long)(PLL1_PFD2_FREQ / 1000);
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do_div(div, pixclock);
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return div;
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}
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int platform_dcu_init(unsigned int xres, unsigned int yres,
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const char *port,
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struct fb_videomode *dcu_fb_videomode)
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{
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fsl_dcu_init(xres, yres, 32);
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return 0;
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}
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