/*
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* Copyright (c) 2016 Toradex, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch-tegra/ap.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <power/as3722.h>
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#include "../common/tdx-common.h"
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#include "pinmux-config-apalis-tk1.h"
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#define LAN_RESET_N TEGRA_GPIO(S, 2)
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int arch_misc_init(void)
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{
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if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
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NVBOOTTYPE_RECOVERY)
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printf("USB recovery mode\n");
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return 0;
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}
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int checkboard(void)
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{
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puts("Model: Toradex Apalis TK1 2GB\n");
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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return ft_common_board_setup(blob, bd);
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}
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#endif
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_clear_tristate_input_clamping();
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gpio_config_table(apalis_tk1_gpio_inits,
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ARRAY_SIZE(apalis_tk1_gpio_inits));
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pinmux_config_pingrp_table(apalis_tk1_pingrps,
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ARRAY_SIZE(apalis_tk1_pingrps));
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pinmux_config_drvgrp_table(apalis_tk1_drvgrps,
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ARRAY_SIZE(apalis_tk1_drvgrps));
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}
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#ifdef CONFIG_PCI_TEGRA
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int tegra_pcie_board_init(void)
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{
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/* TODO: Convert to driver model
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struct udevice *pmic;
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int err;
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err = as3722_init(&pmic);
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if (err) {
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error("failed to initialize AS3722 PMIC: %d\n", err);
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return err;
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}
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err = as3722_sd_enable(pmic, 4);
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if (err < 0) {
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error("failed to enable SD4: %d\n", err);
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return err;
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}
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err = as3722_sd_set_voltage(pmic, 4, 0x24);
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if (err < 0) {
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error("failed to set SD4 voltage: %d\n", err);
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return err;
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}
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err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH |
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AS3722_GPIO_INVERT);
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if (err < 0) {
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error("failed to configure GPIO#1 as output: %d\n", err);
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return err;
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}
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err = as3722_gpio_direction_output(pmic, 2, 1);
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if (err < 0) {
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error("failed to set GPIO#2 high: %d\n", err);
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return err;
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}
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*/
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/* Reset I210 Gigabit Ethernet Controller */
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gpio_request(LAN_RESET_N, "LAN_RESET_N");
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gpio_direction_output(LAN_RESET_N, 0);
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/*
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* Make sure we don't get any back feeding from LAN_WAKE_N resp.
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* DEV_OFF_N
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*/
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gpio_request(TEGRA_GPIO(O, 5), "LAN_WAKE_N");
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gpio_direction_output(TEGRA_GPIO(O, 5), 0);
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gpio_request(TEGRA_GPIO(O, 6), "LAN_DEV_OFF_N");
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gpio_direction_output(TEGRA_GPIO(O, 6), 0);
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/* Make sure LDO9 and LDO10 are initially enabled @ 0V */
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/* TODO: Convert to driver model
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err = as3722_ldo_enable(pmic, 9);
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if (err < 0) {
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error("failed to enable LDO9: %d\n", err);
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return err;
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}
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err = as3722_ldo_enable(pmic, 10);
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if (err < 0) {
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error("failed to enable LDO10: %d\n", err);
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return err;
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}
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err = as3722_ldo_set_voltage(pmic, 9, 0x80);
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if (err < 0) {
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error("failed to set LDO9 voltage: %d\n", err);
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return err;
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}
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err = as3722_ldo_set_voltage(pmic, 10, 0x80);
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if (err < 0) {
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error("failed to set LDO10 voltage: %d\n", err);
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return err;
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}
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*/
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mdelay(100);
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/* Make sure controller gets enabled by disabling DEV_OFF_N */
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gpio_set_value(TEGRA_GPIO(O, 6), 1);
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/* Enable LDO9 and LDO10 for +V3.3_ETH on patched prototypes */
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/* TODO: Convert to driver model
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err = as3722_ldo_set_voltage(pmic, 9, 0xff);
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if (err < 0) {
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error("failed to set LDO9 voltage: %d\n", err);
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return err;
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}
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err = as3722_ldo_set_voltage(pmic, 10, 0xff);
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if (err < 0) {
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error("failed to set LDO10 voltage: %d\n", err);
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return err;
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}
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*/
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mdelay(100);
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gpio_set_value(LAN_RESET_N, 1);
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#ifdef APALIS_TK1_PCIE_EVALBOARD_INIT
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#define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
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#define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
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/* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis Evaluation
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Board */
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gpio_request(PEX_PERST_N, "PEX_PERST_N");
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gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
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gpio_direction_output(PEX_PERST_N, 0);
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gpio_direction_output(RESET_MOCI_CTRL, 0);
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/* Must be asserted for 100 ms after power and clocks are stable */
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mdelay(100);
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gpio_set_value(PEX_PERST_N, 1);
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/* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed Until
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900 us After PEX_PERST# De-assertion */
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mdelay(1);
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gpio_set_value(RESET_MOCI_CTRL, 1);
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#endif /* APALIS_T30_PCIE_EVALBOARD_INIT */
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return 0;
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}
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#endif /* CONFIG_PCI_TEGRA */
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