/*
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* cpld-gpio-bus.c: provides support for the CPLD GPIO bus found on some LaCie
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* boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO
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* bus exposes two registers (address and data). Each of this register is made
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* up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that
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* the registers have been updated.
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*
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* Mostly this bus is used to configure the LEDs on LaCie boards.
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*
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* Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/gpio.h>
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#include "cpld-gpio-bus.h"
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static void cpld_gpio_bus_set_addr(struct cpld_gpio_bus *bus, unsigned addr)
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{
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int pin;
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for (pin = 0; pin < bus->num_addr; pin++)
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kw_gpio_set_value(bus->addr[pin], (addr >> pin) & 1);
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}
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static void cpld_gpio_bus_set_data(struct cpld_gpio_bus *bus, unsigned data)
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{
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int pin;
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for (pin = 0; pin < bus->num_data; pin++)
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kw_gpio_set_value(bus->data[pin], (data >> pin) & 1);
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}
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static void cpld_gpio_bus_enable_select(struct cpld_gpio_bus *bus)
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{
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/* The transfer is enabled on the raising edge. */
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kw_gpio_set_value(bus->enable, 0);
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kw_gpio_set_value(bus->enable, 1);
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}
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void cpld_gpio_bus_write(struct cpld_gpio_bus *bus,
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unsigned addr, unsigned value)
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{
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cpld_gpio_bus_set_addr(bus, addr);
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cpld_gpio_bus_set_data(bus, value);
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cpld_gpio_bus_enable_select(bus);
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}
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