/*
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* Copyright 2013-2015 Arcturus Networks, Inc.
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* http://www.arcturusnetworks.com/products/ucp1020/
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* by Oleksandr G Zhadan et al.
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* based on board/freescale/p1_p2_rdb_pc/spl.c
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* original copyright follows:
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <hwconfig.h>
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#include <pci.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <linux/libfdt.h>
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#include <fdt_support.h>
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#include <fsl_mdio.h>
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#include <tsec.h>
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#include <ioports.h>
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#include <netdev.h>
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#include <micrel.h>
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#include <spi_flash.h>
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#include <mmc.h>
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#include <linux/ctype.h>
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#include <asm/fsl_serdes.h>
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#include <asm/gpio.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_pci.h>
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#include <fsl_ddr_sdram.h>
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#include <asm/io.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_lbc.h>
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#include <asm/mp.h>
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#include "ucp1020.h"
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void spi_set_speed(struct spi_slave *slave, uint hz)
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{
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/* TO DO: It's actially have to be in spi/ */
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}
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/*
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* To be compatible with cmd_gpio
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*/
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int name_to_gpio(const char *name)
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{
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int gpio = 31 - simple_strtoul(name, NULL, 10);
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if (gpio < 16)
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gpio = -1;
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return gpio;
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}
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void board_gpio_init(void)
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{
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int i;
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char envname[8], *val;
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for (i = 0; i < GPIO_MAX_NUM; i++) {
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sprintf(envname, "GPIO%d", i);
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val = env_get(envname);
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if (val) {
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char direction = toupper(val[0]);
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char level = toupper(val[1]);
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if (direction == 'I') {
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gpio_direction_input(i);
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} else {
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if (direction == 'O') {
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if (level == '1')
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gpio_direction_output(i, 1);
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else
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gpio_direction_output(i, 0);
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}
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}
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}
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}
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val = env_get("PCIE_OFF");
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if (val) {
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gpio_direction_input(GPIO_PCIE1_EN);
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gpio_direction_input(GPIO_PCIE2_EN);
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} else {
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gpio_direction_output(GPIO_PCIE1_EN, 1);
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gpio_direction_output(GPIO_PCIE2_EN, 1);
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}
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val = env_get("SDHC_CDWP_OFF");
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if (!val) {
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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setbits_be32(&gur->pmuxcr,
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(MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
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}
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}
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int board_early_init_f(void)
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{
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return 0; /* Just in case. Could be disable in config file */
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}
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int checkboard(void)
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{
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printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
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board_gpio_init();
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printf("SD/MMC: 4-bit Mode\n");
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return 0;
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}
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#ifdef CONFIG_PCI
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void pci_init_board(void)
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{
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fsl_pcie_init_board(0);
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}
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#endif
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int board_early_init_r(void)
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{
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
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/*
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* Remap Boot flash region to caching-inhibited
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* so that flash can be erased properly.
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*/
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* invalidate existing TLB entry for flash */
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disable_tlb(flash_esel);
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set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
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MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, /* perms, wimge */
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0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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#if defined(CONFIG_PHY_MICREL_KSZ9021)
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int regval;
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static int cnt;
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if (cnt++ == 0)
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printf("PHYs address [");
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if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) {
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regval =
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ksz9021_phy_extended_read(phydev,
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MII_KSZ9021_EXT_STRAP_STATUS);
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/*
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* min rx data delay
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*/
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ksz9021_phy_extended_write(phydev,
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MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
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0x6666);
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/*
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* max rx/tx clock delay, min rx/tx control
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*/
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ksz9021_phy_extended_write(phydev,
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MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
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0xf6f6);
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printf("0x%x", (regval & 0x1f));
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} else {
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printf("0x%x", (TSEC2_PHY_ADDR & 0x1f));
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}
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if (cnt == 3)
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printf("] ");
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else
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printf(",");
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#endif
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#if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
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regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000);
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if (regval >= 0)
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printf(" (ADDR 0x%x) ", regval & 0x1f);
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#endif
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return 0;
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}
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int last_stage_init(void)
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{
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static char newkernelargs[256];
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static u8 id1[16];
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static u8 id2;
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struct mmc *mmc;
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char *sval, *kval;
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if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
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printf("Error reading i2c IDT6V49205B information!\n");
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} else {
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printf("IDT6V49205B(0x%02x): ready\n", id1[1]);
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i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
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if (!(id1[1] & 0x02)) {
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id1[1] |= 0x02;
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i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
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asm("nop; nop");
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}
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}
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if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0)
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printf("Error reading i2c NCT72 information!\n");
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else
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printf("NCT72(0x%x): ready\n", id2);
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kval = env_get("kernelargs");
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mmc = find_mmc_device(0);
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if (mmc)
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if (!mmc_init(mmc)) {
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printf("MMC/SD card detected\n");
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if (kval) {
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int n = strlen(defkargs);
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char *tmp = strstr(kval, defkargs);
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*tmp = 0;
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strcpy(newkernelargs, kval);
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strcat(newkernelargs, " ");
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strcat(newkernelargs, mmckargs);
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strcat(newkernelargs, " ");
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strcat(newkernelargs, &tmp[n]);
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env_set("kernelargs", newkernelargs);
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} else {
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env_set("kernelargs", mmckargs);
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}
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}
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get_arc_info();
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if (kval) {
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sval = env_get("SERIAL");
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if (sval) {
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strcpy(newkernelargs, "SN=");
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strcat(newkernelargs, sval);
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strcat(newkernelargs, " ");
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strcat(newkernelargs, kval);
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env_set("kernelargs", newkernelargs);
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}
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} else {
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printf("Error reading kernelargs env variable!\n");
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}
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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struct fsl_pq_mdio_info mdio_info;
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struct tsec_info_struct tsec_info[4];
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#ifdef CONFIG_TSEC2
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#endif
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int num = 0;
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#ifdef CONFIG_TSEC1
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SET_STD_TSEC_INFO(tsec_info[num], 1);
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num++;
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#endif
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#ifdef CONFIG_TSEC2
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SET_STD_TSEC_INFO(tsec_info[num], 2);
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if (is_serdes_configured(SGMII_TSEC2)) {
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if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) {
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puts("eTSEC2 is in sgmii mode.\n");
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tsec_info[num].flags |= TSEC_SGMII;
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tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
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}
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}
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num++;
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#endif
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#ifdef CONFIG_TSEC3
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SET_STD_TSEC_INFO(tsec_info[num], 3);
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num++;
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#endif
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if (!num) {
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printf("No TSECs initialized\n");
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return 0;
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}
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mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
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mdio_info.name = DEFAULT_MII_NAME;
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fsl_pq_mdio_init(bis, &mdio_info);
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tsec_eth_init(bis, tsec_info, num);
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return pci_eth_init(bis);
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, bd_t *bd)
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{
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phys_addr_t base;
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phys_size_t size;
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const char *soc_usb_compat = "fsl-usb2-dr";
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int err, usb1_off, usb2_off;
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ft_cpu_setup(blob, bd);
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base = env_get_bootm_low();
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size = env_get_bootm_size();
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fdt_fixup_memory(blob, (u64)base, (u64)size);
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FT_FSL_PCI_SETUP;
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#if defined(CONFIG_HAS_FSL_DR_USB)
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fsl_fdt_fixup_dr_usb(blob, bd);
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#endif
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#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
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/* Delete eLBC node as it is muxed with USB2 controller */
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if (hwconfig("usb2")) {
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const char *soc_elbc_compat = "fsl,p1020-elbc";
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int off = fdt_node_offset_by_compatible(blob, -1,
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soc_elbc_compat);
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if (off < 0) {
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printf
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("WARNING: could not find compatible node %s: %s\n",
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soc_elbc_compat, fdt_strerror(off));
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return off;
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}
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err = fdt_del_node(blob, off);
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if (err < 0) {
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printf("WARNING: could not remove %s: %s\n",
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soc_elbc_compat, fdt_strerror(err));
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}
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return err;
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}
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#endif
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/* Delete USB2 node as it is muxed with eLBC */
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usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat);
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if (usb1_off < 0) {
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printf("WARNING: could not find compatible node %s: %s.\n",
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soc_usb_compat, fdt_strerror(usb1_off));
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return usb1_off;
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}
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usb2_off =
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fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat);
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if (usb2_off < 0) {
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printf("WARNING: could not find compatible node %s: %s.\n",
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soc_usb_compat, fdt_strerror(usb2_off));
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return usb2_off;
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}
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err = fdt_del_node(blob, usb2_off);
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if (err < 0) {
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printf("WARNING: could not remove %s: %s.\n",
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soc_usb_compat, fdt_strerror(err));
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}
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return 0;
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}
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#endif
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