/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. */
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#ifndef _RKISP_CSI_H
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#define _RKISP_CSI_H
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#include <linux/kfifo.h>
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#define CSI_DEV_NAME DRIVER_NAME "-csi-subdev"
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#define HDR_MAX_DUMMY_BUF 3
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/* define max dmatx to use for hdr */
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#define HDR_DMA_MAX 3
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#define HDR_DMA0 0
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#define HDR_DMA1 1
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#define HDR_DMA2 2
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#define IS_HDR_RDBK(x) ({ \
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typeof(x) __x = (x); \
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(__x == HDR_RDBK_FRAME1 || \
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__x == HDR_RDBK_FRAME2 || \
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__x == HDR_RDBK_FRAME3); \
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})
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enum {
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T_CMD_QUEUE,
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T_CMD_DEQUEUE,
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T_CMD_LEN,
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T_CMD_END,
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};
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enum hdr_op_mode {
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HDR_NORMAL = 0,
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HDR_RDBK_FRAME1 = 4,
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HDR_RDBK_FRAME2 = 5,
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HDR_RDBK_FRAME3 = 6,
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HDR_FRAMEX2_DDR = 8,
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HDR_LINEX2_DDR = 9,
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HDR_LINEX2_NO_DDR = 10,
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HDR_FRAMEX3_DDR = 12,
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HDR_LINEX3_DDR = 13,
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};
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enum rkisp_csi_pad {
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CSI_SINK = 0,
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CSI_SRC_CH0,
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CSI_SRC_CH1,
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CSI_SRC_CH2,
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CSI_SRC_CH3,
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CSI_SRC_CH4,
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CSI_PAD_MAX
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};
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struct sink_info {
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u8 index;
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u8 linked;
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};
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/*
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* struct rkisp_csi_device
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* sink: csi link enable flags
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* mipi_di: Data Identifier (vc[7:6],dt[5:0])
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* tx_first: flags for dmatx first Y_STATE irq
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*/
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struct rkisp_csi_device {
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struct rkisp_device *ispdev;
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struct v4l2_subdev sd;
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struct media_pad pads[CSI_PAD_MAX];
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struct sink_info sink[CSI_PAD_MAX - 1];
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int max_pad;
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u32 err_cnt;
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u32 irq_cnt;
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u8 mipi_di[CSI_PAD_MAX - 1];
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u8 tx_first[HDR_DMA_MAX];
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};
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int rkisp_register_csi_subdev(struct rkisp_device *dev,
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struct v4l2_device *v4l2_dev);
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void rkisp_unregister_csi_subdev(struct rkisp_device *dev);
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int rkisp_csi_get_hdr_cfg(struct rkisp_device *dev, void *arg);
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int rkisp_csi_config_patch(struct rkisp_device *dev);
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void rkisp_csi_sof(struct rkisp_device *dev, u8 id);
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void rkisp_get_remote_mipi_sensor(struct rkisp_device *dev,
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struct v4l2_subdev **sensor_sd, u32 function);
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#endif
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