From 3334dd4e9fc34c79c3925c3c24869939d8955f21 Mon Sep 17 00:00:00 2001
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From: Rosen Penev <rosenp@gmail.com>
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Date: Sat, 18 Jul 2020 12:16:00 -0700
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Subject: [PATCH] hwaccess: use __asm__ as is done elsewhere
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Fixes compilation under powerpc platform. Made the change for the SPARC
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platform as well.
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../hwaccess.c: In function 'sync_primitive':
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../hwaccess.c:74:2: warning: implicit declaration of function 'asm'
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[-Wimplicit-function-declaration]
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74 | asm("eieio" : : : "memory");
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| ^~~
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../hwaccess.c:74:13: error: expected ')' before ':' token
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74 | asm("eieio" : : : "memory");
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Upstream-Status: Submitted [https://github.com/flashrom/flashrom/pull/155]
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Signed-off-by: Rosen Penev <rosenp@gmail.com>
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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hwaccess.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/hwaccess.c b/hwaccess.c
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index 48ccb34..2a39989 100644
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--- a/hwaccess.c
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+++ b/hwaccess.c
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@@ -71,18 +71,18 @@ static inline void sync_primitive(void)
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* See also https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/memory-barriers.txt
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*/
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#if IS_PPC // cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h
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- asm("eieio" : : : "memory");
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+ __asm__ ("eieio" : : : "memory");
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#elif IS_SPARC
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#if defined(__sparc_v9__) || defined(__sparcv9)
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/* Sparc V9 CPUs support three different memory orderings that range from x86-like TSO to PowerPC-like
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* RMO. The modes can be switched at runtime thus to make sure we maintain the right order of access we
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* use the strongest hardware memory barriers that exist on Sparc V9. */
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- asm volatile ("membar #Sync" ::: "memory");
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+ __asm__ volatile ("membar #Sync" ::: "memory");
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#elif defined(__sparc_v8__) || defined(__sparcv8)
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/* On SPARC V8 there is no RMO just PSO and that does not apply to I/O accesses... but if V8 code is run
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* on V9 CPUs it might apply... or not... we issue a write barrier anyway. That's the most suitable
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* operation in the V8 instruction set anyway. If you know better then please tell us. */
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- asm volatile ("stbar");
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+ __asm__ volatile ("stbar");
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#else
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#error Unknown and/or unsupported SPARC instruction set version detected.
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#endif
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--
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2.32.0
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