/*
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* (C) Copyright 2014
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* Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _STV0991_GPT_H
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#define _STV0991_GPT_H
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#include <asm/arch-stv0991/hardware.h>
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struct gpt_regs {
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u32 cr1;
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u32 cr2;
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u32 reserved_1;
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u32 dier; /* dma_int_en */
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u32 sr; /* status reg */
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u32 egr; /* event gen */
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u32 reserved_2[3]; /* offset 0x18--0x20*/
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u32 cnt;
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u32 psc;
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u32 arr;
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};
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struct gpt_regs *const gpt1_regs_ptr =
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(struct gpt_regs *) GPTIMER1_BASE_ADDR;
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/* Timer control1 register */
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#define GPT_CR1_CEN 0x0001
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#define GPT_MODE_AUTO_RELOAD (1 << 7)
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/* Timer prescalar reg */
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#define GPT_PRESCALER_128 0x128
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/* Auto reload register for free running config */
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#define GPT_FREE_RUNNING 0xFFFF
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/* Timer, HZ specific defines */
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#define CONFIG_STV0991_HZ 1000
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#define CONFIG_STV0991_HZ_CLOCK (27*1000*1000)/GPT_PRESCALER_128
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#endif
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